llvm-6502/utils
Toma Tabacu 0e407e7bbf [TableGen] Prevent invalid code generation when emitting AssemblerPredicate conditions.
Summary:
The loop which emits AssemblerPredicate conditions also links them together by emitting a '&&'.
If the 1st predicate is not an AssemblerPredicate, while the 2nd one is, nothing gets emitted for the 1st one, but we still emit the '&&' because of the 2nd predicate.
This generated code looks like "( && Cond2)" and is invalid.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D8294

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234312 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 12:10:11 +00:00
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buildit
count
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release export.sh: Make sure umask is not too restrictive (PR22742) 2015-03-02 17:30:42 +00:00
TableGen [TableGen] Prevent invalid code generation when emitting AssemblerPredicate conditions. 2015-04-07 12:10:11 +00:00
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