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	We were making an attempt to do this by adding an extra callee-saved GPR (so
that there was an even number in the list), but when that failed we went ahead
and pushed anyway.
This had a couple of potential issues:
  + The .cfi directives we emit misplaced dN because they were based on
    PrologEpilogInserter's calculation.
  + Unaligned stores can be less efficient.
  + Unaligned stores can actually fault (likely only an issue in niche cases,
    but possible).
This adds a final explicit stack adjustment if all other options fail, so that
the actual locations of the registers match up with where they should be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221320 91177308-0d34-0410-b5e6-96231b3b80d8
		
	
		
			
				
	
	
		
			252 lines
		
	
	
		
			8.9 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			252 lines
		
	
	
		
			8.9 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
//===-- ARMMachineFuctionInfo.h - ARM machine function info -----*- C++ -*-===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares ARM-specific per-machine-function information.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H
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#define LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H
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#include "ARMSubtarget.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/ADT/DenseMap.h"
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namespace llvm {
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/// ARMFunctionInfo - This class is derived from MachineFunctionInfo and
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/// contains private ARM-specific information for each MachineFunction.
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class ARMFunctionInfo : public MachineFunctionInfo {
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  virtual void anchor();
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  /// isThumb - True if this function is compiled under Thumb mode.
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  /// Used to initialized Align, so must precede it.
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  bool isThumb;
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  /// hasThumb2 - True if the target architecture supports Thumb2. Do not use
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  /// to determine if function is compiled under Thumb mode, for that use
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  /// 'isThumb'.
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  bool hasThumb2;
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  /// StByValParamsPadding - For parameter that is split between
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  /// GPRs and memory; while recovering GPRs part, when
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  /// StackAlignment > 4, and GPRs-part-size mod StackAlignment != 0,
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  /// we need to insert gap before parameter start address. It allows to
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  /// "attach" GPR-part to the part that was passed via stack.
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  unsigned StByValParamsPadding;
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  /// VarArgsRegSaveSize - Size of the register save area for vararg functions.
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  ///
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  unsigned ArgRegsSaveSize;
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  /// ReturnRegsCount - Number of registers used up in the return.
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  unsigned ReturnRegsCount;
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  /// HasStackFrame - True if this function has a stack frame. Set by
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  /// processFunctionBeforeCalleeSavedScan().
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  bool HasStackFrame;
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  /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by
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  /// emitPrologue.
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  bool RestoreSPFromFP;
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  /// LRSpilledForFarJump - True if the LR register has been for spilled to
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  /// enable far jump.
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  bool LRSpilledForFarJump;
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  /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer
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  /// spill stack offset.
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  unsigned FramePtrSpillOffset;
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  /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved
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  /// register spills areas. For Mac OS X:
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  ///
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  /// GPR callee-saved (1) : r4, r5, r6, r7, lr
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  /// --------------------------------------------
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  /// GPR callee-saved (2) : r8, r10, r11
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  /// --------------------------------------------
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  /// DPR callee-saved : d8 - d15
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  ///
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  /// Also see AlignedDPRCSRegs below. Not all D-regs need to go in area 3.
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  /// Some may be spilled after the stack has been realigned.
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  unsigned GPRCS1Offset;
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  unsigned GPRCS2Offset;
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  unsigned DPRCSOffset;
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  /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills
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  /// areas.
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  unsigned GPRCS1Size;
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  unsigned GPRCS2Size;
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  unsigned DPRCSAlignGapSize;
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  unsigned DPRCSSize;
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  /// NumAlignedDPRCS2Regs - The number of callee-saved DPRs that are saved in
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  /// the aligned portion of the stack frame.  This is always a contiguous
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  /// sequence of D-registers starting from d8.
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  ///
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  /// We do not keep track of the frame indices used for these registers - they
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  /// behave like any other frame index in the aligned stack frame.  These
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  /// registers also aren't included in DPRCSSize above.
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  unsigned NumAlignedDPRCS2Regs;
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  /// JumpTableUId - Unique id for jumptables.
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  ///
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  unsigned JumpTableUId;
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  unsigned PICLabelUId;
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  /// VarArgsFrameIndex - FrameIndex for start of varargs area.
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  int VarArgsFrameIndex;
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  /// HasITBlocks - True if IT blocks have been inserted.
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  bool HasITBlocks;
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  /// CPEClones - Track constant pool entries clones created by Constant Island
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  /// pass.
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  DenseMap<unsigned, unsigned> CPEClones;
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  /// GlobalBaseReg - keeps track of the virtual register initialized for
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  /// use as the global base register. This is used for PIC in some PIC
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  /// relocation models.
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  unsigned GlobalBaseReg;
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  /// ArgumentStackSize - amount of bytes on stack consumed by the arguments
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  /// being passed on the stack
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  unsigned ArgumentStackSize;
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  /// CoalescedWeights - mapping of basic blocks to the rolling counter of
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  /// coalesced weights.
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  DenseMap<const MachineBasicBlock*, unsigned> CoalescedWeights;
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public:
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  ARMFunctionInfo() :
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    isThumb(false),
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    hasThumb2(false),
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    ArgRegsSaveSize(0), ReturnRegsCount(0), HasStackFrame(false),
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    RestoreSPFromFP(false),
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    LRSpilledForFarJump(false),
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    FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
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    GPRCS1Size(0), GPRCS2Size(0), DPRCSAlignGapSize(0), DPRCSSize(0),
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    NumAlignedDPRCS2Regs(0),
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    JumpTableUId(0), PICLabelUId(0),
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    VarArgsFrameIndex(0), HasITBlocks(false), GlobalBaseReg(0) {}
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  explicit ARMFunctionInfo(MachineFunction &MF);
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  bool isThumbFunction() const { return isThumb; }
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  bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; }
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  bool isThumb2Function() const { return isThumb && hasThumb2; }
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  unsigned getStoredByValParamsPadding() const { return StByValParamsPadding; }
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  void setStoredByValParamsPadding(unsigned p) { StByValParamsPadding = p; }
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  unsigned getArgRegsSaveSize(unsigned Align = 0) const {
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    if (!Align)
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      return ArgRegsSaveSize;
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    return (ArgRegsSaveSize + Align - 1) & ~(Align - 1);
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  }
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  void setArgRegsSaveSize(unsigned s) { ArgRegsSaveSize = s; }
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  unsigned getReturnRegsCount() const { return ReturnRegsCount; }
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  void setReturnRegsCount(unsigned s) { ReturnRegsCount = s; }
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  bool hasStackFrame() const { return HasStackFrame; }
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  void setHasStackFrame(bool s) { HasStackFrame = s; }
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  bool shouldRestoreSPFromFP() const { return RestoreSPFromFP; }
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  void setShouldRestoreSPFromFP(bool s) { RestoreSPFromFP = s; }
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  bool isLRSpilledForFarJump() const { return LRSpilledForFarJump; }
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  void setLRIsSpilledForFarJump(bool s) { LRSpilledForFarJump = s; }
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  unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; }
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  void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; }
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  unsigned getNumAlignedDPRCS2Regs() const { return NumAlignedDPRCS2Regs; }
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  void setNumAlignedDPRCS2Regs(unsigned n) { NumAlignedDPRCS2Regs = n; }
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  unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; }
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  unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; }
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  unsigned getDPRCalleeSavedAreaOffset()  const { return DPRCSOffset; }
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  void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; }
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  void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; }
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  void setDPRCalleeSavedAreaOffset(unsigned o)  { DPRCSOffset = o; }
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  unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; }
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  unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; }
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  unsigned getDPRCalleeSavedGapSize() const   { return DPRCSAlignGapSize; }
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  unsigned getDPRCalleeSavedAreaSize()  const { return DPRCSSize; }
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  void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; }
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  void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; }
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  void setDPRCalleeSavedGapSize(unsigned s)   { DPRCSAlignGapSize = s; }
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  void setDPRCalleeSavedAreaSize(unsigned s)  { DPRCSSize = s; }
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  unsigned getArgumentStackSize() const { return ArgumentStackSize; }
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  void setArgumentStackSize(unsigned size) { ArgumentStackSize = size; }
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  unsigned createJumpTableUId() {
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    return JumpTableUId++;
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  }
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  unsigned getNumJumpTables() const {
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    return JumpTableUId;
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  }
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  void initPICLabelUId(unsigned UId) {
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    PICLabelUId = UId;
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  }
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  unsigned getNumPICLabels() const {
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    return PICLabelUId;
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  }
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  unsigned createPICLabelUId() {
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    return PICLabelUId++;
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  }
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  int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
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  void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
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  bool hasITBlocks() const { return HasITBlocks; }
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  void setHasITBlocks(bool h) { HasITBlocks = h; }
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  unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
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  void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
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  void recordCPEClone(unsigned CPIdx, unsigned CPCloneIdx) {
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    if (!CPEClones.insert(std::make_pair(CPCloneIdx, CPIdx)).second)
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      llvm_unreachable("Duplicate entries!");
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  }
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  unsigned getOriginalCPIdx(unsigned CloneIdx) const {
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    DenseMap<unsigned, unsigned>::const_iterator I = CPEClones.find(CloneIdx);
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    if (I != CPEClones.end())
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      return I->second;
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    else
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      return -1U;
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  }
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  DenseMap<const MachineBasicBlock*, unsigned>::iterator getCoalescedWeight(
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                                                  MachineBasicBlock* MBB) {
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    auto It = CoalescedWeights.find(MBB);
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    if (It == CoalescedWeights.end()) {
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      It = CoalescedWeights.insert(std::make_pair(MBB, 0)).first;
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    }
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    return It;
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  }
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};
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} // End llvm namespace
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#endif
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