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0f1a21bcb8c51df494a58f519df9fc901bff585d
llvm-6502/test/MC/Disassembler
History
Colin LeMahieu a032778dcf [Hexagon] Adding vector shift instructions and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227619 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-30 21:58:46 +00:00
..
AArch64
Condition codes AL and NV are invalid in the aliases that use
2014-06-10 13:11:35 +00:00
ARM
Add support for ARM modified-immediate assembly syntax.
2014-12-02 10:53:20 +00:00
Hexagon
[Hexagon] Adding vector shift instructions and tests.
2015-01-30 21:58:46 +00:00
Mips
[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.
2015-01-29 11:33:41 +00:00
PowerPC
[PowerPC] Add assembler support for mcrfs and friends
2015-01-15 01:00:53 +00:00
Sparc
Reduce verbiage of lit.local.cfg files
2014-06-09 22:42:55 +00:00
SystemZ
[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA
2014-07-10 11:00:55 +00:00
X86
[X86] Teach disassembler to handle illegal immediates on AVX512 integer compare instructions.
2015-01-28 10:09:56 +00:00
XCore
Reduce verbiage of lit.local.cfg files
2014-06-09 22:42:55 +00:00
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