Chad Rosier 5b3fca50a0 The getRegForInlineAsmConstraint function should only accept MVT value types. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8

2013-06-22 18:37:38 +00:00

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CMakeLists.txt

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DAGCombiner.cpp

Fix PR16360

2013-06-21 18:45:27 +00:00

FastISel.cpp

DebugInfo: Don't lose unreferenced non-trivial by-value parameters

2013-06-21 22:56:30 +00:00

FunctionLoweringInfo.cpp

Don't cache the TLI object since we have access to it through TargetMachine already.

2013-06-19 20:32:16 +00:00

InstrEmitter.cpp

Debug Info: Simplify Frame Index handling in DBG_VALUE Machine Instructions

2013-06-16 20:34:15 +00:00

InstrEmitter.h

Use MachineInstrBuilder in InstrEmitter.

2012-12-20 18:08:09 +00:00

LegalizeDAG.cpp

Introduce getSelect usage and use more getSelectCC

2013-06-14 22:04:37 +00:00

LegalizeFloatTypes.cpp

Introduce getSelect usage and use more getSelectCC

2013-06-14 22:04:37 +00:00

LegalizeIntegerTypes.cpp

Introduce getSelect usage and use more getSelectCC

2013-06-14 22:04:37 +00:00

LegalizeTypes.cpp

Remove double semicolons.

2013-05-28 16:31:26 +00:00

LegalizeTypes.h

Track IR ordering of SelectionDAG nodes 2/4.

2013-05-25 02:42:55 +00:00

LegalizeTypesGeneric.cpp

Track IR ordering of SelectionDAG nodes 2/4.

2013-05-25 02:42:55 +00:00

LegalizeVectorOps.cpp

Introduce getSelect usage and use more getSelectCC

2013-06-14 22:04:37 +00:00

LegalizeVectorTypes.cpp

Introduce getSelect usage and use more getSelectCC

2013-06-14 22:04:37 +00:00

LLVMBuild.txt

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Makefile

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ResourcePriorityQueue.cpp

Cache the TargetLowering info object as a pointer.

2013-06-06 00:43:09 +00:00

ScheduleDAGFast.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

ScheduleDAGRRList.cpp

Cache the TargetLowering info object as a pointer.

2013-06-06 00:43:09 +00:00

ScheduleDAGSDNodes.cpp

Fix PR16143: Insert DEBUG_VALUE before terminator.

2013-05-26 08:58:50 +00:00

ScheduleDAGSDNodes.h

Fix #includes, so we include only what we really need.

2013-02-20 00:26:25 +00:00

ScheduleDAGVLIW.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

SDNodeDbgValue.h

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SelectionDAG.cpp

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

SelectionDAGBuilder.cpp

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

SelectionDAGBuilder.h

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

SelectionDAGDumper.cpp

Track IR ordering of SelectionDAG nodes 2/4.

2013-05-25 02:42:55 +00:00

SelectionDAGISel.cpp

Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.

2013-06-19 21:36:55 +00:00

SelectionDAGPrinter.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

TargetLowering.cpp

The getRegForInlineAsmConstraint function should only accept MVT value types.

2013-06-22 18:37:38 +00:00

TargetSelectionDAGInfo.cpp

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