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Tilmann Scheller 0f7b2e9db0 [ARM] Make the assembler reject unpredictable pre/post-indexed ARM STR instructions. 
The ARM ARM prohibits STR instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling STR instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213745 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 12:38:17 +00:00
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Analysis
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AsmParser
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Bitcode
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CodeGen
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DebugInfo
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ExecutionEngine
AArch64: remove arm64 triple enumerator.
2014-07-23 12:32:47 +00:00
IR
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IRReader
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LineEditor
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Linker
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LTO
AArch64: remove arm64 triple enumerator.
2014-07-23 12:32:47 +00:00
MC
AArch64: remove arm64 triple enumerator.
2014-07-23 12:32:47 +00:00
Object
AArch64: remove arm64 triple enumerator.
2014-07-23 12:32:47 +00:00
Option
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ProfileData
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Support
AArch64: remove arm64 triple enumerator.
2014-07-23 12:32:47 +00:00
TableGen
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Target
[ARM] Make the assembler reject unpredictable pre/post-indexed ARM STR instructions.
2014-07-23 12:38:17 +00:00
Transforms
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CMakeLists.txt
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LLVMBuild.txt
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Makefile
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