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10f7f2a222
Although there is only one Altivec VRSAVE register, it is a member of a register class, and we need the ability to spill it. Because this register is normally callee-preserved and handled by special code this has never before been necessary. However, this capability will be required by a forthcoming commit adding SjLj support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177654 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
603 B
LLVM
19 lines
603 B
LLVM
; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define <4 x float> @foo(<4 x float> %a, <4 x float> %b) nounwind {
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entry:
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%c = fadd <4 x float> %a, %b
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call void asm sideeffect "", "~{VRsave}"() nounwind
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br label %return
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; CHECK: @foo
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; CHECK: mfspr {{[0-9]+}}, 256
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; CHECK: mtspr 256, {{[0-9]+}}
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return: ; preds = %entry
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ret <4 x float> %c
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}
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