Bill Wendling 07d3177117 Revert r107205 and r107207. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107215 91177308-0d34-0410-b5e6-96231b3b80d8

2010-06-29 22:34:52 +00:00

..

Analysis.h

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AsmPrinter.h

Revert r107205 and r107207.

2010-06-29 22:34:52 +00:00

BinaryObject.h

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CalcSpillWeights.h

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CallingConvLower.h

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FastISel.h

Teach regular and fast isel to set dead flags on unused implicit defs

2010-06-18 23:28:01 +00:00

GCMetadata.h

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GCMetadataPrinter.h

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GCs.h

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GCStrategy.h

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IntrinsicLowering.h

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ISDOpcodes.h

When splitting a VAARG, remember its alignment.

2010-06-26 18:22:20 +00:00

JITCodeEmitter.h

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LatencyPriorityQueue.h

Eliminate the use of PriorityQueue and just use a std::vector,

2010-05-26 18:52:00 +00:00

LinkAllAsmWriterComponents.h

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LinkAllCodegenComponents.h

Remove the local register allocator.

2010-06-15 21:58:33 +00:00

LiveInterval.h

VNInfos don't need to be destructed anymore.

2010-06-26 11:30:59 +00:00

LiveIntervalAnalysis.h

Remove the now unused LiveIntervals::getVNInfoSourceReg().

2010-06-24 20:18:15 +00:00

LiveStackAnalysis.h

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LiveVariables.h

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MachineBasicBlock.h

Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out

2010-06-22 17:25:57 +00:00

MachineCodeEmitter.h

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MachineCodeInfo.h

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MachineConstantPool.h

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MachineDominators.h

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MachineFrameInfo.h

Add explicit keywords.

2010-06-18 19:04:37 +00:00

MachineFunction.h

Revert r107205 and r107207.

2010-06-29 22:34:52 +00:00

MachineFunctionAnalysis.h

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MachineFunctionPass.h

Make MachineFunctionPass::createPrinterPass private, as no subclasses

2010-06-05 01:19:12 +00:00

MachineInstr.h

Teach regular and fast isel to set dead flags on unused implicit defs

2010-06-18 23:28:01 +00:00

MachineInstrBuilder.h

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MachineJumpTableInfo.h

Add explicit keywords.

2010-06-18 19:04:37 +00:00

MachineLocation.h

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MachineLoopInfo.h

Move PHIElimination's SplitCriticalEdge for MachineBasicBlocks out

2010-06-22 17:25:57 +00:00

MachineMemOperand.h

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MachineModuleInfo.h

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MachineModuleInfoImpls.h

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MachineOperand.h

Add a TargetRegisterInfo::composeSubRegIndices hook with a default

2010-05-28 18:18:53 +00:00

MachinePassRegistry.h

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MachineRegisterInfo.h

Start TargetRegisterClass indices at 0 instead of 1, so that

2010-06-18 18:13:55 +00:00

MachineRelocation.h

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MachineSSAUpdater.h

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MachORelocation.h

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ObjectCodeEmitter.h

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Passes.h

Remove the local register allocator.

2010-06-15 21:58:33 +00:00

PostRAHazardRecognizer.h

Add missing include to unbreak the build.

2010-06-14 22:44:26 +00:00

ProcessImplicitDefs.h

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PseudoSourceValue.h

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RegAllocRegistry.h

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RegisterCoalescer.h

Be more strict about subreg-to-subreg copies in CoalescerPair.

2010-06-24 16:19:28 +00:00

RegisterScavenging.h

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RuntimeLibcalls.h

back-end libcall handling for ATOMIC_SWAP (__sync_lock_test_and_set)

2010-06-18 23:03:10 +00:00

ScheduleDAG.h

Change push_all to a non-virtual function and implement it in the

2010-05-26 01:10:55 +00:00

ScheduleHazardRecognizer.h

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SchedulerRegistry.h

Add a hybrid bottom up scheduler that reduce register usage while avoiding

2010-05-20 06:13:19 +00:00

SelectionDAG.h

When splitting a VAARG, remember its alignment.

2010-06-26 18:22:20 +00:00

SelectionDAGISel.h

Reapply r106634, now that the bug it exposed is fixed.

2010-06-24 14:30:44 +00:00

SelectionDAGNodes.h

Teach regular and fast isel to set dead flags on unused implicit defs

2010-06-18 23:28:01 +00:00

SlotIndexes.h

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TargetLoweringObjectFileImpl.h

More data/parsing support for tls directives. Add a few more testcases

2010-05-17 22:53:55 +00:00

ValueTypes.h

Fix enum to address array bounds regression.

2010-05-18 21:22:12 +00:00

ValueTypes.td

Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.

2010-05-13 23:55:47 +00:00