Akira Hatanaka db8e0bbedb [mips] Increase the number of floating point control registers available to 32. ... Create a dedicated register class for floating point condition code registers and move FCC0 from register class CCR to the new register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185373 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-01 20:31:44 +00:00
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lit.local.cfg
mips32_le.txt
mips32.txt
mips32r2_le.txt
mips32r2.txt
mips64_le.txt
mips64.txt
mips64r2_le.txt
mips64r2.txt
mips-dsp.txt