mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-31 08:16:47 +00:00
5c8b83eb7a
The logic for expanding atomics that aren't natively supported in terms of cmpxchg loops is much simpler to express at the IR level. It also allows the normal optimisations and CodeGen improvements to help out with atomics, instead of using a limited set of possible instructions.. rdar://problem/13496295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212119 91177308-0d34-0410-b5e6-96231b3b80d8
236 lines
5.3 KiB
LLVM
236 lines
5.3 KiB
LLVM
; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
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@sc64 = external global i64
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define void @atomic_fetch_add64() nounwind {
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; X64-LABEL: atomic_fetch_add64:
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; X32-LABEL: atomic_fetch_add64:
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entry:
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%t1 = atomicrmw add i64* @sc64, i64 1 acquire
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; X64: lock
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; X64: incq
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%t2 = atomicrmw add i64* @sc64, i64 3 acquire
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; X64: lock
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; X64: addq $3
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%t3 = atomicrmw add i64* @sc64, i64 5 acquire
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; X64: lock
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; X64: xaddq
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%t4 = atomicrmw add i64* @sc64, i64 %t3 acquire
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; X64: lock
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; X64: addq
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ret void
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; X64: ret
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}
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define void @atomic_fetch_sub64() nounwind {
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; X64-LABEL: atomic_fetch_sub64:
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; X32-LABEL: atomic_fetch_sub64:
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%t1 = atomicrmw sub i64* @sc64, i64 1 acquire
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; X64: lock
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; X64: decq
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%t2 = atomicrmw sub i64* @sc64, i64 3 acquire
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; X64: lock
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; X64: subq $3
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%t3 = atomicrmw sub i64* @sc64, i64 5 acquire
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; X64: lock
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; X64: xaddq
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%t4 = atomicrmw sub i64* @sc64, i64 %t3 acquire
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; X64: lock
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; X64: subq
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ret void
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; X64: ret
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}
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define void @atomic_fetch_and64() nounwind {
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; X64-LABEL: atomic_fetch_and64:
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; X32-LABEL: atomic_fetch_and64:
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%t1 = atomicrmw and i64* @sc64, i64 3 acquire
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; X64: lock
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; X64: andq $3
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%t2 = atomicrmw and i64* @sc64, i64 5 acquire
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; X64: andq
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; X64: lock
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; X64: cmpxchgq
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%t3 = atomicrmw and i64* @sc64, i64 %t2 acquire
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; X64: lock
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; X64: andq
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ret void
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; X64: ret
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}
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define void @atomic_fetch_or64() nounwind {
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; X64-LABEL: atomic_fetch_or64:
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; X32-LABEL: atomic_fetch_or64:
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%t1 = atomicrmw or i64* @sc64, i64 3 acquire
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; X64: lock
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; X64: orq $3
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%t2 = atomicrmw or i64* @sc64, i64 5 acquire
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; X64: orq
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; X64: lock
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; X64: cmpxchgq
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%t3 = atomicrmw or i64* @sc64, i64 %t2 acquire
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; X64: lock
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; X64: orq
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ret void
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; X64: ret
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}
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define void @atomic_fetch_xor64() nounwind {
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; X64-LABEL: atomic_fetch_xor64:
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; X32-LABEL: atomic_fetch_xor64:
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%t1 = atomicrmw xor i64* @sc64, i64 3 acquire
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; X64: lock
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; X64: xorq $3
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%t2 = atomicrmw xor i64* @sc64, i64 5 acquire
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; X64: xorq
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; X64: lock
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; X64: cmpxchgq
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%t3 = atomicrmw xor i64* @sc64, i64 %t2 acquire
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; X64: lock
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; X64: xorq
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ret void
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; X64: ret
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}
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define void @atomic_fetch_nand64(i64 %x) nounwind {
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; X64-LABEL: atomic_fetch_nand64:
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; X32-LABEL: atomic_fetch_nand64:
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%t1 = atomicrmw nand i64* @sc64, i64 %x acquire
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; X64: andq
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; X64: notq
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; X64: lock
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; X64: cmpxchgq
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; X32: andl
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; X32: andl
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; X32: notl
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; X32: notl
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; X32: lock
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; X32: cmpxchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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define void @atomic_fetch_max64(i64 %x) nounwind {
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; X64-LABEL: atomic_fetch_max64:
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; X32-LABEL: atomic_fetch_max64:
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%t1 = atomicrmw max i64* @sc64, i64 %x acquire
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; X64: subq
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; X64: cmov
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; X64: lock
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; X64: cmpxchgq
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; X32: cmpl
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; X32: cmpl
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; X32: cmov
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; X32: cmov
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; X32: cmov
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; X32: lock
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; X32: cmpxchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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define void @atomic_fetch_min64(i64 %x) nounwind {
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; X64-LABEL: atomic_fetch_min64:
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; X32-LABEL: atomic_fetch_min64:
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%t1 = atomicrmw min i64* @sc64, i64 %x acquire
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; X64: subq
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; X64: cmov
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; X64: lock
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; X64: cmpxchgq
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; X32: cmpl
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; X32: cmpl
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; X32: cmov
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; X32: cmov
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; X32: cmov
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; X32: lock
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; X32: cmpxchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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define void @atomic_fetch_umax64(i64 %x) nounwind {
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; X64-LABEL: atomic_fetch_umax64:
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; X32-LABEL: atomic_fetch_umax64:
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%t1 = atomicrmw umax i64* @sc64, i64 %x acquire
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; X64: subq
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; X64: cmov
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; X64: lock
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; X64: cmpxchgq
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; X32: cmpl
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; X32: cmpl
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; X32: cmov
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; X32: cmov
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; X32: cmov
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; X32: lock
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; X32: cmpxchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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define void @atomic_fetch_umin64(i64 %x) nounwind {
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; X64-LABEL: atomic_fetch_umin64:
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; X32-LABEL: atomic_fetch_umin64:
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%t1 = atomicrmw umin i64* @sc64, i64 %x acquire
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; X64: subq
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; X64: cmov
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; X64: lock
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; X64: cmpxchgq
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; X32: cmpl
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; X32: cmpl
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; X32: cmov
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; X32: cmov
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; X32: cmov
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; X32: lock
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; X32: cmpxchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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define void @atomic_fetch_cmpxchg64() nounwind {
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; X64-LABEL: atomic_fetch_cmpxchg64:
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; X32-LABEL: atomic_fetch_cmpxchg64:
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%t1 = cmpxchg i64* @sc64, i64 0, i64 1 acquire acquire
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; X64: lock
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; X64: cmpxchgq
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; X32: lock
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; X32: cmpxchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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define void @atomic_fetch_store64(i64 %x) nounwind {
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; X64-LABEL: atomic_fetch_store64:
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; X32-LABEL: atomic_fetch_store64:
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store atomic i64 %x, i64* @sc64 release, align 8
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; X64-NOT: lock
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; X64: movq
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; X32: lock
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; X32: cmpxchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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define void @atomic_fetch_swap64(i64 %x) nounwind {
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; X64-LABEL: atomic_fetch_swap64:
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; X32-LABEL: atomic_fetch_swap64:
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%t1 = atomicrmw xchg i64* @sc64, i64 %x acquire
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; X64-NOT: lock
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; X64: xchgq
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; X32: lock
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; X32: xchg8b
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ret void
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; X64: ret
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; X32: ret
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}
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