mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-10-30 16:17:05 +00:00
fb1e26d9a2
Summary: Fixes an issue where a test attempts to use -mcpu=x86-64 on non-X86-64 targets. This triggers an assertion in the MIPS backend since it doesn't know what ABI to use by default for unrecognized processors. CC: llvm-commits, rafael Differential Revision: http://llvm-reviews.chandlerc.com/D2877 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202369 91177308-0d34-0410-b5e6-96231b3b80d8
29 lines
1.1 KiB
LLVM
29 lines
1.1 KiB
LLVM
; RUN: llc --march=x86 --mcpu=x86-64 --mattr=ssse3 < %s
|
|
; RUN: llc --march=x86-64 --mcpu=x86-64 --mattr=ssse3 < %s
|
|
|
|
;PR18045:
|
|
;Issue of selection for 'v4i32 load'.
|
|
;This instruction is not legal for X86 CPUs with sse < 'sse4.1'.
|
|
;This node was generated by X86ISelLowering.cpp, EltsFromConsecutiveLoads
|
|
;static function after legalize stage.
|
|
|
|
@e = external global [4 x i32], align 4
|
|
@f = external global [4 x i32], align 4
|
|
|
|
; Function Attrs: nounwind
|
|
define void @fn3(i32 %el) {
|
|
entry:
|
|
%0 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 0)
|
|
%1 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 1)
|
|
%2 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 2)
|
|
%3 = load i32* getelementptr inbounds ([4 x i32]* @e, i32 0, i32 3)
|
|
%4 = insertelement <4 x i32> undef, i32 %0, i32 0
|
|
%5 = insertelement <4 x i32> %4, i32 %1, i32 1
|
|
%6 = insertelement <4 x i32> %5, i32 %2, i32 2
|
|
%7 = insertelement <4 x i32> %6, i32 %3, i32 3
|
|
%8 = add <4 x i32> %6, %7
|
|
store <4 x i32> %8, <4 x i32>* bitcast ([4 x i32]* @f to <4 x i32>*)
|
|
ret void
|
|
}
|
|
|