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https://github.com/c64scene-ar/llvm-6502.git
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a7934dd8e4
instruction set has no 64-bit SRA support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141570 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.5 KiB
LLVM
56 lines
1.5 KiB
LLVM
; RUN: llc < %s -march=x86 -mcpu=yonah -promote-elements -mattr=+sse2,-sse41 | FileCheck %s
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; currently (xor v4i32) is defined as illegal, so we scalarize the code.
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define void@vsel_float(<4 x float>* %v1, <4 x float>* %v2) {
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%A = load <4 x float>* %v1
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%B = load <4 x float>* %v2
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%vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x float> %A, <4 x float> %B
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store <4 x float > %vsel, <4 x float>* %v1
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ret void
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}
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; currently (xor v4i32) is defined as illegal, so we scalarize the code.
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define void@vsel_i32(<4 x i32>* %v1, <4 x i32>* %v2) {
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%A = load <4 x i32>* %v1
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%B = load <4 x i32>* %v2
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%vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i32> %A, <4 x i32> %B
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store <4 x i32 > %vsel, <4 x i32>* %v1
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ret void
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}
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; CHECK: vsel_i64
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; CHECK: pxor
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; CHECK: pand
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; CHECK: andnps
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; CHECK: orps
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; CHECK: ret
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define void@vsel_i64(<4 x i64>* %v1, <4 x i64>* %v2) {
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%A = load <4 x i64>* %v1
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%B = load <4 x i64>* %v2
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%vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i64> %A, <4 x i64> %B
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store <4 x i64 > %vsel, <4 x i64>* %v1
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ret void
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}
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; CHECK: vsel_double
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; CHECK: pxor
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; CHECK: pand
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; CHECK: andnps
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; CHECK: orps
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; CHECK: ret
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define void@vsel_double(<4 x double>* %v1, <4 x double>* %v2) {
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%A = load <4 x double>* %v1
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%B = load <4 x double>* %v2
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%vsel = select <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x double> %A, <4 x double> %B
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store <4 x double > %vsel, <4 x double>* %v1
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ret void
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}
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