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Craig Topper 12216172c0 Make X86 instruction selection use 256-bit VPXOR for build_vector of all ones if AVX2 is enabled. This gives the ExeDepsFix pass a chance to choose FP vs int as appropriate. Also use v8i32 as the type for getZeroVector if AVX2 is enabled. This is consistent with SSE2 using prefering v4i32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 08:12:35 +00:00
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docs Revert accidental commit. 2012-01-12 23:06:28 +00:00
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include Added the MachineSchedulerPass skeleton. 2012-01-13 06:30:30 +00:00
lib Make X86 instruction selection use 256-bit VPXOR for build_vector of all ones if AVX2 is enabled. This gives the ExeDepsFix pass a chance to choose FP vs int as appropriate. Also use v8i32 as the type for getZeroVector if AVX2 is enabled. This is consistent with SSE2 using prefering v4i32. 2012-01-13 08:12:35 +00:00
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test test/CodeGen/ARM/test-sharedidx.ll: Fix for -Asserts. 2012-01-13 07:03:55 +00:00
tools 80 columns. 2012-01-11 21:23:35 +00:00
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utils Delete CodeInit and CodeRecTy from TableGen. 2012-01-13 03:38:34 +00:00
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README.txt Undo test commit 2011-11-22 20:05:48 +00:00

README.txt 

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================================

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