mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b177041dfa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210442 91177308-0d34-0410-b5e6-96231b3b80d8
233 lines
7.7 KiB
C++
233 lines
7.7 KiB
C++
//===- llvm/unittests/IR/DominatorTreeTest.cpp - Constants unit tests -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/IR/Dominators.h"
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#include "llvm/Analysis/PostDominators.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/Support/SourceMgr.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace llvm {
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void initializeDPassPass(PassRegistry&);
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namespace {
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struct DPass : public FunctionPass {
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static char ID;
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virtual bool runOnFunction(Function &F) {
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DominatorTree *DT =
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&getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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PostDominatorTree *PDT = &getAnalysis<PostDominatorTree>();
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Function::iterator FI = F.begin();
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BasicBlock *BB0 = FI++;
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BasicBlock::iterator BBI = BB0->begin();
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Instruction *Y1 = BBI++;
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Instruction *Y2 = BBI++;
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Instruction *Y3 = BBI++;
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BasicBlock *BB1 = FI++;
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BBI = BB1->begin();
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Instruction *Y4 = BBI++;
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BasicBlock *BB2 = FI++;
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BBI = BB2->begin();
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Instruction *Y5 = BBI++;
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BasicBlock *BB3 = FI++;
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BBI = BB3->begin();
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Instruction *Y6 = BBI++;
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Instruction *Y7 = BBI++;
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BasicBlock *BB4 = FI++;
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BBI = BB4->begin();
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Instruction *Y8 = BBI++;
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Instruction *Y9 = BBI++;
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// Reachability
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EXPECT_TRUE(DT->isReachableFromEntry(BB0));
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EXPECT_TRUE(DT->isReachableFromEntry(BB1));
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EXPECT_TRUE(DT->isReachableFromEntry(BB2));
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EXPECT_FALSE(DT->isReachableFromEntry(BB3));
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EXPECT_TRUE(DT->isReachableFromEntry(BB4));
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// BB dominance
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EXPECT_TRUE(DT->dominates(BB0, BB0));
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EXPECT_TRUE(DT->dominates(BB0, BB1));
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EXPECT_TRUE(DT->dominates(BB0, BB2));
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EXPECT_TRUE(DT->dominates(BB0, BB3));
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EXPECT_TRUE(DT->dominates(BB0, BB4));
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EXPECT_FALSE(DT->dominates(BB1, BB0));
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EXPECT_TRUE(DT->dominates(BB1, BB1));
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EXPECT_FALSE(DT->dominates(BB1, BB2));
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EXPECT_TRUE(DT->dominates(BB1, BB3));
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EXPECT_FALSE(DT->dominates(BB1, BB4));
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EXPECT_FALSE(DT->dominates(BB2, BB0));
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EXPECT_FALSE(DT->dominates(BB2, BB1));
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EXPECT_TRUE(DT->dominates(BB2, BB2));
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EXPECT_TRUE(DT->dominates(BB2, BB3));
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EXPECT_FALSE(DT->dominates(BB2, BB4));
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EXPECT_FALSE(DT->dominates(BB3, BB0));
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EXPECT_FALSE(DT->dominates(BB3, BB1));
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EXPECT_FALSE(DT->dominates(BB3, BB2));
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EXPECT_TRUE(DT->dominates(BB3, BB3));
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EXPECT_FALSE(DT->dominates(BB3, BB4));
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// BB proper dominance
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EXPECT_FALSE(DT->properlyDominates(BB0, BB0));
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EXPECT_TRUE(DT->properlyDominates(BB0, BB1));
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EXPECT_TRUE(DT->properlyDominates(BB0, BB2));
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EXPECT_TRUE(DT->properlyDominates(BB0, BB3));
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EXPECT_FALSE(DT->properlyDominates(BB1, BB0));
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EXPECT_FALSE(DT->properlyDominates(BB1, BB1));
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EXPECT_FALSE(DT->properlyDominates(BB1, BB2));
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EXPECT_TRUE(DT->properlyDominates(BB1, BB3));
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EXPECT_FALSE(DT->properlyDominates(BB2, BB0));
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EXPECT_FALSE(DT->properlyDominates(BB2, BB1));
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EXPECT_FALSE(DT->properlyDominates(BB2, BB2));
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EXPECT_TRUE(DT->properlyDominates(BB2, BB3));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB0));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB1));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB2));
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EXPECT_FALSE(DT->properlyDominates(BB3, BB3));
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// Instruction dominance in the same reachable BB
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EXPECT_FALSE(DT->dominates(Y1, Y1));
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EXPECT_TRUE(DT->dominates(Y1, Y2));
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EXPECT_FALSE(DT->dominates(Y2, Y1));
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EXPECT_FALSE(DT->dominates(Y2, Y2));
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// Instruction dominance in the same unreachable BB
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EXPECT_TRUE(DT->dominates(Y6, Y6));
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EXPECT_TRUE(DT->dominates(Y6, Y7));
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EXPECT_TRUE(DT->dominates(Y7, Y6));
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EXPECT_TRUE(DT->dominates(Y7, Y7));
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// Invoke
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EXPECT_TRUE(DT->dominates(Y3, Y4));
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EXPECT_FALSE(DT->dominates(Y3, Y5));
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// Phi
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EXPECT_TRUE(DT->dominates(Y2, Y9));
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EXPECT_FALSE(DT->dominates(Y3, Y9));
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EXPECT_FALSE(DT->dominates(Y8, Y9));
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// Anything dominates unreachable
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EXPECT_TRUE(DT->dominates(Y1, Y6));
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EXPECT_TRUE(DT->dominates(Y3, Y6));
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// Unreachable doesn't dominate reachable
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EXPECT_FALSE(DT->dominates(Y6, Y1));
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// Instruction, BB dominance
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EXPECT_FALSE(DT->dominates(Y1, BB0));
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EXPECT_TRUE(DT->dominates(Y1, BB1));
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EXPECT_TRUE(DT->dominates(Y1, BB2));
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EXPECT_TRUE(DT->dominates(Y1, BB3));
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EXPECT_TRUE(DT->dominates(Y1, BB4));
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EXPECT_FALSE(DT->dominates(Y3, BB0));
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EXPECT_TRUE(DT->dominates(Y3, BB1));
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EXPECT_FALSE(DT->dominates(Y3, BB2));
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EXPECT_TRUE(DT->dominates(Y3, BB3));
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EXPECT_FALSE(DT->dominates(Y3, BB4));
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EXPECT_TRUE(DT->dominates(Y6, BB3));
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// Post dominance.
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EXPECT_TRUE(PDT->dominates(BB0, BB0));
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EXPECT_FALSE(PDT->dominates(BB1, BB0));
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EXPECT_FALSE(PDT->dominates(BB2, BB0));
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EXPECT_FALSE(PDT->dominates(BB3, BB0));
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EXPECT_TRUE(PDT->dominates(BB4, BB1));
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// Dominance descendants.
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SmallVector<BasicBlock *, 8> DominatedBBs, PostDominatedBBs;
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DT->getDescendants(BB0, DominatedBBs);
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PDT->getDescendants(BB0, PostDominatedBBs);
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EXPECT_EQ(DominatedBBs.size(), 4UL);
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EXPECT_EQ(PostDominatedBBs.size(), 1UL);
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// BB3 is unreachable. It should have no dominators nor postdominators.
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DominatedBBs.clear();
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PostDominatedBBs.clear();
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DT->getDescendants(BB3, DominatedBBs);
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DT->getDescendants(BB3, PostDominatedBBs);
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EXPECT_EQ(DominatedBBs.size(), 0UL);
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EXPECT_EQ(PostDominatedBBs.size(), 0UL);
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return false;
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.addRequired<PostDominatorTree>();
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}
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DPass() : FunctionPass(ID) {
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initializeDPassPass(*PassRegistry::getPassRegistry());
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}
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};
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char DPass::ID = 0;
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Module* makeLLVMModule(DPass *P) {
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const char *ModuleStrig =
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"declare i32 @g()\n" \
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"define void @f(i32 %x) {\n" \
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"bb0:\n" \
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" %y1 = add i32 %x, 1\n" \
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" %y2 = add i32 %x, 1\n" \
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" %y3 = invoke i32 @g() to label %bb1 unwind label %bb2\n" \
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"bb1:\n" \
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" %y4 = add i32 %x, 1\n" \
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" br label %bb4\n" \
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"bb2:\n" \
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" %y5 = landingpad i32 personality i32 ()* @g\n" \
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" cleanup\n" \
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" br label %bb4\n" \
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"bb3:\n" \
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" %y6 = add i32 %x, 1\n" \
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" %y7 = add i32 %x, 1\n" \
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" ret void\n" \
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"bb4:\n" \
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" %y8 = phi i32 [0, %bb2], [%y4, %bb1]\n"
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" %y9 = phi i32 [0, %bb2], [%y4, %bb1]\n"
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" ret void\n" \
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"}\n";
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LLVMContext &C = getGlobalContext();
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SMDiagnostic Err;
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return ParseAssemblyString(ModuleStrig, nullptr, Err, C);
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}
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TEST(DominatorTree, Unreachable) {
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DPass *P = new DPass();
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std::unique_ptr<Module> M(makeLLVMModule(P));
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PassManager Passes;
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Passes.add(P);
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Passes.run(*M);
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}
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}
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}
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INITIALIZE_PASS_BEGIN(DPass, "dpass", "dpass", false, false)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(PostDominatorTree)
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INITIALIZE_PASS_END(DPass, "dpass", "dpass", false, false)
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