llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-04-11 00:39:36 +00:00

History

Bruno Cardoso Lopes 1485cc2bb3 x86 vector shuffle lowering now relies only on target specific

nodes to emit shuffles and don't do isel mask matching anymore.
- Add the selection of the remaining shuffle opcode (movddup)
- Introduce two new functions to "recognize" where we may get
potential folds and add several comments to them explaining why
they are not yet in the desidered shape.
- Add more patterns to fallback the case where we select
a specific shuffle opcode as if it could fold a load, but it
can't, so remap to a valid instruction.
- Add a couple of FIXMEs to address in the following days once
there's a good solution to the current folding problem.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113369 91177308-0d34-0410-b5e6-96231b3b80d8

2010-09-08 17:43:25 +00:00

Analysis

Add a new experimental generalized dependence query interface to

2010-09-08 01:32:20 +00:00

Archive

Eliminate some unnessary Path::exists() calls.

2010-05-27 20:51:54 +00:00

AsmParser

remove unions from LLVM IR. They are severely buggy and not

2010-08-28 04:09:24 +00:00

Bitcode

zap dead code.