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15307c3eb2bca50642d08fc93b640c98e7c4dc7d
llvm-6502/test/CodeGen
History
Sanjay Patel 4616d7dd2f fix test attributes; this is an SSE2 test, not a Nehalem test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228546 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-08 21:14:27 +00:00
..
AArch64
ARM & AArch64: teach LowerVSETCC that output type size may differ from input.
2015-02-08 00:50:47 +00:00
ARM
ARM & AArch64: teach LowerVSETCC that output type size may differ from input.
2015-02-08 00:50:47 +00:00
BPF
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CPP
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Generic
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Hexagon
[Hexagon] Simplifying and formatting several patterns. Changing a pattern multiply to be expanded.
2015-02-05 21:13:25 +00:00
Inputs
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Mips
[mips][microMIPS] Implement CodeGen support for SW16 and LW16 instructions
2015-02-04 15:43:17 +00:00
MSP430
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NVPTX
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PowerPC
[PowerPC] Handle loop predecessor invokes
2015-02-07 07:32:58 +00:00
R600
R600/SI: Amend a test to ensure WQM is enabled for LDS in pixel shaders
2015-02-06 02:51:29 +00:00
SPARC
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SystemZ
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Thumb
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Thumb2
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X86
fix test attributes; this is an SSE2 test, not a Nehalem test
2015-02-08 21:14:27 +00:00
XCore
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