Justin Holewinski 07bc0b6ae6 [NVPTX] Add missing .v4 qualifier on vector store instruction ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213276 91177308-0d34-0410-b5e6-96231b3b80d8

2014-07-17 16:58:56 +00:00

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access-non-generic.ll

Canonicalize addrspacecast ConstExpr between different pointer types

2014-06-15 21:40:57 +00:00

add-128bit.ll

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addrspacecast-gvar.ll

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addrspacecast.ll

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aggr-param.ll

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annotations.ll

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arg-lowering.ll

[NVPTX] Clean up argument lowering code and properly handle alignment for structs and vectors

2014-06-27 18:35:44 +00:00

arithmetic-fp-sm20.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

arithmetic-int.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

atomics.ll

[NVPTX] Add missing isel patterns for 64-bit atomics

2014-06-27 18:35:30 +00:00

bfe.ll

[NVPTX] Add isel patterns for bit-field extract (bfe)

2014-06-27 18:35:27 +00:00

bug17709.ll

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call-with-alloca-buffer.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

callchain.ll

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calling-conv.ll

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compare-int.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

constant-vectors.ll

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convert-fp.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

convert-int-sm20.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

ctlz.ll

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ctpop.ll

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cttz.ll

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div-ri.ll

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envreg.ll

[NVPTX] Add support for envreg reads

2014-06-27 18:35:21 +00:00

fast-math.ll

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fma-disable.ll

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fma.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

fp-literals.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

generic-to-nvvm.ll

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global-ordering.ll

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gvar-init.ll

[NVPTX] Error out if initializer is given for variable in an address space that does not support initialization

2014-06-27 18:36:01 +00:00

i1-global.ll

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i1-int-to-fp.ll

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i1-param.ll

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i8-param.ll

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imad.ll

[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns

2014-06-27 18:35:37 +00:00

implicit-def.ll

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inline-asm.ll

[NVPTX] Add 'b' asm constraint

2014-06-27 18:36:06 +00:00

intrin-nocapture.ll

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intrinsic-old.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

intrinsics.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

isspacep.ll

[NVPTX] Add support for isspacep instruction

2014-06-27 18:35:24 +00:00

ld-addrspace.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

ld-generic.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

ldparam-v4.ll

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ldu-i8.ll

[NVPTX] Fix handling of ldg/ldu intrinsics.

2014-06-27 18:35:51 +00:00

ldu-ldg.ll

[NVPTX] Fix handling of ldg/ldu intrinsics.

2014-06-27 18:35:51 +00:00

ldu-reg-plus-offset.ll

[NVPTX] Fix handling of ldg/ldu intrinsics.

2014-06-27 18:35:51 +00:00

lit.local.cfg

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load-sext-i1.ll

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local-stack-frame.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

managed.ll

[NVPTX] Add support for .managed variables for UVM

2014-06-27 18:35:58 +00:00

misaligned-vector-ldst.ll

[NVPTX] Honor alignment on vector loads/stores

2014-07-16 19:45:35 +00:00

module-inline-asm.ll

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mulwide.ll

[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns

2014-06-27 18:35:37 +00:00

noduplicate-syncthreads.ll

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nvvm-reflect.ll

[NVPTX] Add reflect intrinsic (better than matching by function name)

2014-06-27 18:36:11 +00:00

param-align.ll

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pr13291-i1-store.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

pr16278.ll

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pr17529.ll

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ptx-version-30.ll

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ptx-version-31.ll

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refl1.ll

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rotate.ll

[NVPTX] Add support for efficient rotate instructions on SM 3.2+

2014-06-27 18:35:33 +00:00

rsqrt.ll

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sched1.ll

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sched2.ll

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sext-in-reg.ll

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sext-params.ll

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shift-parts.ll

[NVPTX] Add support for [SHL,SRA,SRL]_PARTS

2014-06-27 18:35:40 +00:00

simple-call.ll

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sm-version-20.ll

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sm-version-21.ll

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sm-version-30.ll

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sm-version-35.ll

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st-addrspace.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

st-generic.ll

[NVPTX] Rename registers %fl -> %fd and %rl -> %rd

2014-07-16 16:26:58 +00:00

surf-read-cuda.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

surf-read.ll

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surf-write-cuda.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

surf-write.ll

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symbol-naming.ll

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tex-read-cuda.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

tex-read.ll

[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch

2014-07-17 11:59:04 +00:00

texsurf-queries.ll

[NVPTX] Flag surface/texture query instructions with IsTexSurfQuery

2014-07-17 14:51:33 +00:00

tuple-literal.ll

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vec8.ll

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vec-param-load.ll

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vector-args.ll

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vector-call.ll

[NVPTX] Add missing .v4 qualifier on vector store instruction

2014-07-17 16:58:56 +00:00

vector-compare.ll

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vector-loads.ll

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vector-select.ll

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vector-stores.ll

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weak-global.ll

[NVPTX] Emit .weak linkage for link_once, weak, available_externally, and common linkage

2014-06-27 18:35:56 +00:00

weak-linkage.ll

[NVPTX] Emit .weak when linkage is not external, internal, or private

2014-06-27 18:35:10 +00:00