llvm-6502/test/CodeGen
Chris Lattner 15c2351a93 Update this test. Due to dag combiner improvements, we now compile
f7/f11 to:

_f7:
	eor r0, r0, #2, 2 @ -2147483648
	bx lr
_f11:
	bic r0, r0, #2, 2 @ -2147483648
	bx lr

instead of:

_f7:
	fmsr s0, r0
	fnegs s0, s0
	fmrs r0, s0
	bx lr

_f11:
	fmsr s0, r0
	fabss s0, s0
	fmrs r0, s0
	bx lr



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46423 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-27 23:26:37 +00:00
..
Alpha
ARM Update this test. Due to dag combiner improvements, we now compile 2008-01-27 23:26:37 +00:00
CBackend
CellSPU remove extraneous &&'s from tests, as Scott is apparently not going to. 2008-01-18 19:53:43 +00:00
Generic Fix some bugs in SimplifyNodeWithTwoResults where it would call deletenode to 2008-01-26 01:09:19 +00:00
IA64
PowerPC Need to convert to LLVM code and not C. 2008-01-26 06:56:08 +00:00
SPARC
X86 Implement some dag combines that allow doing fneg/fabs/fcopysign in integer 2008-01-27 17:42:27 +00:00