Misha Brukman 15eb0a15e5 * Do not allocate r0 as we use it indiscriminantly in the instr selector. ... * Do not define CR register class because we don't (yet) have the i4 type git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14551 91177308-0d34-0410-b5e6-96231b3b80d8		2004-07-01 21:24:50 +00:00
..
CBackend	Move the IntrinsicLowering header into the CodeGen directory, as per PR346	2004-06-20 07:49:54 +00:00
PowerPC	* Do not allocate r0 as we use it indiscriminantly in the instr selector.	2004-07-01 21:24:50 +00:00
Sparc	Fix indentation to be 2 spaces.	2004-06-30 22:11:03 +00:00
SparcV8	Fix indentation to be 2 spaces.	2004-06-30 22:11:03 +00:00
SparcV9	This class is no longer an annotation	2004-06-27 18:50:49 +00:00
X86	Fix associativity of parameters to assert(): now it actually makes sense.	2004-06-29 19:43:20 +00:00
Makefile
MRegisterInfo.cpp
Target.td
TargetData.cpp	Handle targets where alignment can be bigger than the size of the data.	2004-07-01 17:32:59 +00:00
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp	Direct declaration of namespace-ified globals does not work, must enclose	2004-06-21 21:44:12 +00:00
TargetSchedInfo.cpp	Adjust to new TM interface	2004-06-02 05:56:04 +00:00