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16865d06128c266b5505cc21f5d086d18173408c
llvm-6502/test/CodeGen
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Akira Hatanaka 16865d0612 Disable Mips' delay slot filler when optimization level is O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162589 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-24 20:40:15 +00:00
..
ARM
Rejected 169195. As Duncan commented, bitcasting to proper type is wrong approach. We need to insert some valid TRANCATE node here.
2012-08-22 09:33:55 +00:00
CellSPU
Add test triples to fix win32 failures. Revert workaround from r161292.
2012-08-08 20:31:37 +00:00
CPP
test commit
2012-07-18 17:53:05 +00:00
Generic
BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle
2012-08-24 18:14:27 +00:00
Hexagon
[Hexagon] Don't mark callee saved registers as clobbered by a tail call
2012-08-13 19:54:01 +00:00
MBlaze
…
Mips
Disable Mips' delay slot filler when optimization level is O0.
2012-08-24 20:40:15 +00:00
MSP430
Reapply r161633-161634 "Partition use lists so defs always come before uses.""
2012-08-10 00:21:30 +00:00
NVPTX
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PowerPC
Lower constant pools and jump tables via TOC on PPC64/SVR4.
2012-08-24 16:26:02 +00:00
SPARC
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Thumb
…
Thumb2
Add ADD and SUB to the predicable ARM instructions.
2012-08-16 23:21:55 +00:00
X86
fix a case where all operands of BUILD_VECTOR are undefined
2012-08-20 17:59:18 +00:00
XCore
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