Mihai Popa 16ad92ad3c This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183733 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-11 09:39:51 +00:00
..
arm-LDREXD-reencoding.txt
arm-STREXD-reencoding.txt
arm-tests.txt
arm-thumb-trustzone.txt
arm-trustzone.txt
basic-arm-instructions.txt
fp-encoding.txt	This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.	2013-06-11 09:39:51 +00:00
hex-immediates.txt
invalid-Bcc-thumb.txt
invalid-BFI-arm.txt
invalid-CPS2p-arm.txt
invalid-CPS3p-arm.txt
invalid-CPS-arm.txt
invalid-DMB-thumb.txt
invalid-DSB-arm.txt
invalid-FSTMX-arm.txt
invalid-hint-arm.txt
invalid-hint-thumb.txt
invalid-IT-CBNZ-thumb.txt
invalid-IT-CC15.txt
invalid-IT-thumb.txt
invalid-LDC-form-arm.txt
invalid-LDM-thumb.txt
invalid-LDR_POST-arm.txt
invalid-LDR_PRE-arm.txt
invalid-LDRB_POST-arm.txt
invalid-LDRD_PRE-thumb.txt
invalid-LDRrs-arm.txt
invalid-MCR-arm.txt
invalid-MOVr-arm.txt
invalid-MOVs-arm.txt
invalid-MOVs-LSL-arm.txt
invalid-MOVTi16-arm.txt
invalid-MRRC2-arm.txt
invalid-MSRi-arm.txt
invalid-RFEorLDMIA-arm.txt
invalid-SBFX-arm.txt
invalid-SMLAD-arm.txt
invalid-SRS-arm.txt
invalid-STMIA_UPD-thumb.txt
invalid-SXTB-arm.txt
invalid-t2Bcc-thumb.txt
invalid-t2LDRBT-thumb.txt
invalid-t2LDREXD-thumb.txt
invalid-t2LDRSHi8-thumb.txt
invalid-t2LDRSHi12-thumb.txt
invalid-t2PUSH-thumb.txt
invalid-t2STR_POST-thumb.txt
invalid-t2STRD_PRE-thumb.txt
invalid-t2STREXB-thumb.txt
invalid-t2STREXD-thumb.txt
invalid-UMAAL-arm.txt
invalid-VCVT-arm.txt
invalid-VEXTd-arm.txt
invalid-VLD1DUPq8_UPD-arm.txt
invalid-VLD1LNd32_UPD-thumb.txt
invalid-VLD3DUPd32_UPD-thumb.txt
invalid-VLD4DUPd32_UPD-thumb.txt
invalid-VLD4LNd32_UPD-thumb.txt
invalid-VLDMSDB_UPD-arm.txt
invalid-VLDST-arm.txt
invalid-VMOV-arm.txt
invalid-VQADD-arm.txt
invalid-VST1d8Twb_register-thumb.txt
invalid-VST1LNd32_UPD-thumb.txt
invalid-VST2b32_UPD-arm.txt
invalid-VST4LNd32_UPD-thumb.txt
ldrd-armv4.txt
lit.local.cfg
marked-up-thumb.txt
memory-arm-instructions.txt
neon-tests.txt
neon.txt
neont2.txt
neont-VLD-reencoding.txt
neont-VST-reencoding.txt
thumb1.txt
thumb2.txt
thumb-MSR-MClass.txt
thumb-printf.txt
thumb-tests.txt
unpredictable-ADC-arm.txt
unpredictable-ADDREXT3-arm.txt
unpredictable-AExtI-arm.txt
unpredictable-AI1cmp-arm.txt
unpredictable-BFI.txt
unpredictable-LDR-arm.txt
unpredictable-LDRD-arm.txt
unpredictable-LSL-regform.txt
unpredictable-MRRC2-arm.txt
unpredictable-MRS-arm.txt
unpredictable-MUL-arm.txt
unpredictable-RSC-arm.txt
unpredictable-SEL-arm.txt	Convert the uses of '|&' to use '2>&1 |' instead, which works on old	2012-07-02 18:37:59 +00:00
unpredictable-SHADD16-arm.txt
unpredictable-SSAT-arm.txt
unpredictable-STRBrs-arm.txt
unpredictable-swp-arm.txt
unpredictable-UQADD8-arm.txt
unpredictables-thumb.txt
vfp4.txt