Jakob Stoklund Olesen 17ca0f8f80 Implement SPARCv9 atomic_swap_64 with a pseudo. ... The SWAP instruction only exists in a 32-bit variant, but the 64-bit atomic swap can be implemented in terms of CASX, like the other atomic rmw primitives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200453 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-30 04:48:46 +00:00
..
64abi.ll
64bit.ll	Clean up the Legal/Expand logic for SPARC popc.	2014-01-26 08:12:34 +00:00
64cond.ll
64spill.ll
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll	[SparcV9] Use correct register class (I64RegClass) to hold the address of _GLOBAL_OFFSET_TABLE_ in sparcv9.	2014-01-29 03:35:08 +00:00
2009-08-28-WeakLinkage.ll
2011-01-11-Call.ll
2011-01-11-CC.ll
2011-01-11-FrameAddr.ll
2011-01-19-DelaySlot.ll
2011-01-21-ByValArgs.ll
2011-01-22-SRet.ll
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll
atomics.ll	Implement SPARCv9 atomic_swap_64 with a pseudo.	2014-01-30 04:48:46 +00:00
basictest.ll
blockaddr.ll
constpool.ll
ctpop.ll	Only generate the popc instruction for SPARC CPUs that implement it.	2014-01-26 06:09:59 +00:00
DbgValueOtherTargets.test
exception.ll	[Sparc] Use %r_disp32 for pc_rel entries in FDE as well.	2014-01-29 06:59:20 +00:00
float.ll
fp128.ll
globals.ll
inlineasm.ll	[Sparc] Add support for inline assembly constraints which specify registers by their aliases.	2014-01-22 03:18:42 +00:00
leafproc.ll
lit.local.cfg
missinglabel.ll
mult-alt-generic-sparc.ll
private.ll
rem.ll
setjmp.ll
spillsize.ll
tls.ll
varargs.ll