Charlie Turner 3a8b98c984 Fix wrong encoding of MRSBanked. ...

Patch by Matthew Wahab.

Change-Id: Ia2a001ca2760028ea360fe77b56f203a219eefbc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222920 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-28 15:01:06 +00:00

..

addrmode2-reencoding.txt

ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions

2014-01-12 04:36:01 +00:00

arm-LDREXD-reencoding.txt

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arm-STREXD-reencoding.txt

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arm-tests.txt

Remove the cortex-a9-mp CPU.

2014-11-03 17:38:00 +00:00

arm-thumb-trustzone.txt

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arm-trustzone.txt

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basic-arm-instructions-v8.txt

[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)

2013-11-08 16:16:30 +00:00

basic-arm-instructions.txt

[ARM] Introduce the 'sevl' instruction in ARMv8.

2013-10-01 12:39:11 +00:00

crc32-thumb.txt

'svn add' the test cases.

2013-09-18 09:46:49 +00:00

crc32.txt

'svn add' the test cases.

2013-09-18 09:46:49 +00:00

d16.txt

Fix bashism in tests added by r221341

2014-11-05 12:40:21 +00:00

fp-armv8.txt

[ARM] Add support for MVFR2 which is new in ARMv8

2013-11-11 19:56:13 +00:00

fp-encoding.txt

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hex-immediates.txt

ARM: honor hex immediate formatting for ldr/str i12 offsets.

2014-06-11 20:26:45 +00:00

invalid-armv7.txt

[ARM] Introduce the 'sevl' instruction in ARMv8.

2013-10-01 12:39:11 +00:00

invalid-armv8.txt

[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings)

2013-11-08 16:17:14 +00:00

invalid-because-armv7.txt

[ARM] Add support for MVFR2 which is new in ARMv8

2013-11-11 19:56:13 +00:00

invalid-FSTMX-arm.txt

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invalid-IT-CC15.txt

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invalid-thumb-MSR-MClass.txt

Thumb2 M-class MSR instruction support changes

2014-09-01 11:25:07 +00:00

invalid-thumbv7-xfail.txt

Improve llvm-mc disassembler mode and refactor ARM tests to use it

2013-07-19 10:05:04 +00:00

invalid-thumbv7.txt

ARM: implement support for the UDF mnemonic

2014-05-14 03:47:39 +00:00

invalid-thumbv8.txt

[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings)

2013-11-08 16:25:50 +00:00

ldrd-armv4.txt

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lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

load-store-acquire-release-v8-thumb.txt

[ARMv8] Add MC support for the new load/store acquire/release instructions.

2013-08-27 17:38:16 +00:00

load-store-acquire-release-v8.txt

[ARMv8] Add MC support for the new load/store acquire/release instructions.

2013-08-27 17:38:16 +00:00

marked-up-thumb.txt

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memory-arm-instructions.txt

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move-banked-regs-arm.txt

Fix wrong encoding of MRSBanked.

2014-11-28 15:01:06 +00:00

move-banked-regs-thumb.txt

ARM: implement MRS/MSR (banked reg) system instructions.

2014-08-15 10:47:12 +00:00

neon-crypto.txt

[ARMv8] Add support for the v8 cryptography extensions.

2013-09-19 11:59:01 +00:00

neon-tests.txt

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neon-v8.txt

[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.

2013-07-19 16:34:16 +00:00

neon.txt

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neont2.txt

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neont-VLD-reencoding.txt

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neont-VST-reencoding.txt

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thumb1.txt

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thumb2-preloads.txt

[Thumb2] Improve disassembly of memory hints

2014-10-23 08:52:58 +00:00

thumb2-v8.txt

[ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings)

2013-11-08 16:25:50 +00:00

thumb2.txt

Make ARM hint ranges consistent, and add tests for these ranges

2013-10-23 10:14:40 +00:00

thumb-fp-armv8.txt

Fix tests for hasFPARMv8 name change (r190692)

2013-09-13 14:37:52 +00:00

thumb-MSR-MClass.txt

Thumb2 M-class MSR instruction support changes

2014-09-01 11:25:07 +00:00

thumb-neon-crypto.txt

[ARM] NEON instructions were erroneously decoded from certain invalid encodings

2013-10-30 18:10:09 +00:00

thumb-neon-v8.txt

[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.

2013-07-19 16:34:16 +00:00

thumb-printf.txt

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thumb-tests.txt

Remove the cortex-a9-mp CPU.

2014-11-03 17:38:00 +00:00

thumb-v8.txt

[ARMv8] Add some missing tests for DSB/DMB.

2013-09-05 16:05:45 +00:00

unpredictable-ADC-arm.txt

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unpredictable-ADDREXT3-arm.txt

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unpredictable-AExtI-arm.txt

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unpredictable-AI1cmp-arm.txt

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unpredictable-BFI.txt

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unpredictable-LDR-arm.txt

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unpredictable-LDRD-arm.txt

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unpredictable-LSL-regform.txt

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unpredictable-MRRC2-arm.txt

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unpredictable-MRS-arm.txt

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unpredictable-MUL-arm.txt

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unpredictable-RSC-arm.txt

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unpredictable-SEL-arm.txt

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unpredictable-SHADD16-arm.txt

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unpredictable-SSAT-arm.txt

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unpredictable-STRBrs-arm.txt

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unpredictable-swp-arm.txt

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unpredictable-UQADD8-arm.txt

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unpredictables-thumb.txt

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vfp4.txt

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