Jyotsna Verma 1a35b8e2eb Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181624 91177308-0d34-0410-b5e6-96231b3b80d8

2013-05-10 20:27:34 +00:00

..

absaddr-store.ll

Hexagon: Use multiclass for absolute addressing mode stores.

2013-02-05 18:15:34 +00:00

absimm.ll

Hexagon: Remove duplicate instructions to handle global/immediate values

2013-04-23 17:11:46 +00:00

adde.ll

Hexagon: Expand addc, adde, subc and sube.

2013-03-05 19:04:47 +00:00

always-ext.ll

Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions.

2013-04-23 21:17:40 +00:00

args.ll

Hexagon: Add encoding bits to the TFR64 instructions.

2013-03-05 18:42:28 +00:00

ashift-left-right.ll

Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.

2013-03-26 15:43:57 +00:00

block-addr.ll

Hexagon: Add support to lower block address.

2013-03-07 19:10:28 +00:00

cext-check.ll

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

cext-valid-packet1.ll

Hexagon: Add constant extender support framework.

2013-03-01 17:37:13 +00:00

cext-valid-packet2.ll

Hexagon: Add constant extender support framework.

2013-03-01 17:37:13 +00:00

cmp_pred2.ll

Hexagon: Remove assembler mapped instruction definitions.

2013-04-23 19:15:55 +00:00

cmp_pred_reg.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

cmp_pred.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

cmp-to-genreg.ll

Hexagon: Add V4 compare instructions. Enable relationship mapping

2013-02-05 16:42:24 +00:00

cmp-to-predreg.ll

Hexagon: Add V4 compare instructions. Enable relationship mapping

2013-02-05 16:42:24 +00:00

cmpb_pred.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

combine_ir.ll

Hexagon - Add peephole optimizations for zero extends.

2013-05-02 20:22:51 +00:00

combine.ll

…

convertdptoint.ll

…

convertdptoll.ll

…

convertsptoint.ll

…

convertsptoll.ll

…

ctlz-cttz-ctpop.ll

Hexagon: Expand cttz, ctlz, and ctpop for now.

2013-02-21 19:39:40 +00:00

dadd.ll

…

dmul.ll

…

double.ll

…

doubleconvert-ieee-rnd-near.ll

…

dsub.ll

…

dualstore.ll

Hexagon: Add encoding bits to the TFR64 instructions.

2013-03-05 18:42:28 +00:00

fadd.ll

…

fcmp.ll

…

float.ll

…

floatconvert-ieee-rnd-near.ll

…

fmul.ll

…

frame.ll

…

fsub.ll

…

fusedandshift.ll

…

gp-plus-offset-load.ll

Hexagon: Use absolute addressing mode loads/stores for global+offset

2013-02-13 21:38:46 +00:00

gp-plus-offset-store.ll

Hexagon: Use absolute addressing mode loads/stores for global+offset

2013-02-13 21:38:46 +00:00

gp-rel.ll

Hexagon: Use multiclass for gp-relative instructions.

2013-03-28 16:25:57 +00:00

hwloop-cleanup.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-const.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

hwloop-dbg.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

hwloop-le.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-lt1.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-lt.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-ne.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

i1_VarArg.ll

Hexagon: Handle i8, i16 and i1 Var Args.

2013-03-07 20:28:34 +00:00

i8_VarArg.ll

Hexagon: Handle i8, i16 and i1 Var Args.

2013-03-07 20:28:34 +00:00

i16_VarArg.ll

Hexagon: Handle i8, i16 and i1 Var Args.

2013-03-07 20:28:34 +00:00

idxload-with-zero-offset.ll

…

indirect-br.ll

Hexagon: Add support to lower block address.

2013-03-07 19:10:28 +00:00

lit.local.cfg

…

macint.ll

…

memops1.ll

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

memops2.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

memops3.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

memops.ll

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

misaligned-access.ll

Hexagon: Removed asserts regarding alignment and offset.

2013-03-14 19:08:03 +00:00

mpy.ll

…

newvaluejump2.ll

…

newvaluejump.ll

…

newvaluestore.ll

…

opt-fabs.ll

…

opt-fneg.ll

…

postinc-load.ll

…

postinc-store.ll

Hexagon: Add testcase for post-increment store instructions.

2013-02-05 18:23:51 +00:00

pred-absolute-store.ll

Hexagon: Add support to generate predicated absolute addressing mode

2013-02-12 16:06:23 +00:00

pred-gp.ll

Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.

2013-05-10 20:27:34 +00:00

pred-instrs.ll

Hexagon: Use relation map for getMatchingCondBranchOpcode() and

2013-05-09 18:25:44 +00:00

predicate-copy.ll

Hexagon: add support for predicate-GPR copies.

2013-02-13 22:56:34 +00:00

remove_lsr.ll

TBAA: remove !tbaa from testing cases if not used.

2013-04-30 17:52:57 +00:00

simpletailcall.ll

…

split-const32-const64.ll

Hexagon: Fix Small Data support to handle -G 0 correctly.

2013-05-07 19:53:00 +00:00

static.ll

…

struct_args_large.ll

…

struct_args.ll

Hexagon: Add V4 combine instructions and some more Def Pats for V2.

2013-02-04 15:52:56 +00:00

sube.ll

Hexagon: Expand addc, adde, subc and sube.

2013-03-05 19:04:47 +00:00

union-1.ll

Hexagon - Add peephole optimizations for zero extends.

2013-05-02 20:22:51 +00:00

vaddh.ll

…

validate-offset.ll

…

zextloadi1.ll

Hexagon: Add patterns for zero extended loads from i1->i64.

2013-03-08 14:15:15 +00:00