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https://github.com/c64scene-ar/llvm-6502.git
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9cc361579b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4443 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
3.5 KiB
C++
103 lines
3.5 KiB
C++
//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
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//
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// This file exposes a function named BuildMI, which is useful for dramatically
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// simplifying how MachineInstr's are created. Instead of using code like this:
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//
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// M = new MachineInstr(X86::ADDrr32);
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// M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
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// M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
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//
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// we can now use code like this:
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//
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// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
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#include "llvm/CodeGen/MachineInstr.h"
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struct MachineInstrBuilder {
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MachineInstr *MI;
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MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
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/// Allow automatic conversion to the machine instruction we are working on.
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///
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operator MachineInstr*() const { return MI; }
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/// addReg - Add a new virtual register operand...
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///
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MachineInstrBuilder &addReg(int RegNo, bool isDef = false) {
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MI->addRegOperand(RegNo, isDef);
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return *this;
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}
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/// addReg - Add an LLVM value that is to be used as a register...x
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///
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MachineInstrBuilder &addReg(Value *V, bool isDef = false, bool isDNU = false){
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MI->addRegOperand(V, isDef, isDNU);
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return *this;
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}
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/// addPCDisp - Add an LLVM value to be treated as a PC relative
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/// displacement...
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///
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MachineInstrBuilder &addPCDisp(Value *V) {
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MI->addPCDispOperand(V);
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return *this;
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}
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/// addMReg - Add a machine register operand...
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///
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MachineInstrBuilder &addMReg(int Reg, bool isDef=false) {
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MI->addMachineRegOperand(Reg, isDef);
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return *this;
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}
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/// addSImm - Add a new sign extended immediate operand...
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///
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MachineInstrBuilder &addSImm(int64_t val) {
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MI->addSignExtImmOperand(val);
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return *this;
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}
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/// addZImm - Add a new zero extended immediate operand...
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///
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MachineInstrBuilder &addZImm(int64_t Val) {
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MI->addZeroExtImmOperand(Val);
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return *this;
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}
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};
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/// BuildMI - Builder interface. Specify how to create the initial instruction
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/// itself. NumOperands is the number of operands to the machine instruction to
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/// allow for memory efficient representation of machine instructions.
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///
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inline MachineInstrBuilder BuildMI(MachineOpCode Opcode, unsigned NumOperands) {
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return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
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}
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/// BuildMI - This version of the builder inserts the built MachineInstr into
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/// the specified MachineBasicBlock.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
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unsigned NumOperands) {
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return MachineInstrBuilder(new MachineInstr(BB, Opcode, NumOperands));
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}
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/// BuildMI - This version of the builder inserts the built MachineInstr into
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/// the specified MachineBasicBlock, and also sets up the first "operand" as a
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/// destination virtual register. NumOperands is the number of additional add*
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/// calls that are expected, it does not include the destination register.
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///
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inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, MachineOpCode Opcode,
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unsigned NumOperands, unsigned DestReg) {
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return MachineInstrBuilder(new MachineInstr(BB, Opcode,
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NumOperands+1)).addReg(DestReg,
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true);
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}
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#endif
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