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1aeb7ac6246c39703e08089ab0dc2f35631b8bb5
llvm-6502/test/MC
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Craig Topper 04c5be9f12 Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03 08:14:29 +00:00
..
ARM
Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
2011-09-28 14:21:38 +00:00
AsmParser
Added regression test for bug #10869.
2011-09-19 07:48:08 +00:00
COFF
Add the suffix to the Win64 EH data sections' names if given. Add a test for
2011-05-27 21:38:47 +00:00
Disassembler
Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.
2011-10-03 08:14:29 +00:00
ELF
Fix the bitwidth of the remaining fields.
2011-08-04 17:00:11 +00:00
MachO
Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom
2011-09-08 20:53:44 +00:00
MBlaze
Teach the MBlaze asm parser how to parse special purpose register names.
2010-12-20 20:43:24 +00:00
X86
The wrong relocation was being emitted for several SSSE3 instructions.
2011-09-20 21:39:21 +00:00
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