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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-15 23:31:37 +00:00
Amaury de la Vieuville ebc3938ae7 ARM: check predicate bits for thumb instructions
When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184707 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 09:15:01 +00:00
..
2013-05-05 13:36:53 +00:00