Benjamin Kramer 1c10b8de46 BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift. ...

This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into
	shrl	$2, %edi
	imulq	$613566757, %rdi, %rax
	shrq	$32, %rax
	ret

instead of
	movl    %edi, %eax
	imulq   $613566757, %rax, %rcx
	shrq    $32, %rcx
	subl    %ecx, %eax
	shrl    %eax
	addl    %ecx, %eax
	shrl    $4, %eax

on x86_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127829 91177308-0d34-0410-b5e6-96231b3b80d8

2011-03-17 20:39:14 +00:00

..

CMakeLists.txt

Removed a bunch of unnecessary target_link_libraries.

2010-09-28 22:39:14 +00:00

DAGCombiner.cpp

Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613.

2011-03-11 00:48:56 +00:00

FastISel.cpp

Teach FastISel to support register-immediate-immediate instructions.

2011-03-11 21:33:55 +00:00

FunctionLoweringInfo.cpp

There are times when the landing pad won't have a call to 'eh.selector' in

2011-03-03 23:14:05 +00:00

InstrEmitter.cpp

Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.

2011-01-10 02:58:51 +00:00

InstrEmitter.h

Don't set kill flags for instructions which the scheduler has cloned.

2010-05-14 22:01:14 +00:00

LegalizeDAG.cpp

Use the correct LHS type when determining the legalization of a shift's RHS type.

2011-03-07 18:29:47 +00:00

LegalizeFloatTypes.cpp

Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.

2011-02-25 21:41:48 +00:00

LegalizeIntegerTypes.cpp

Revert commit 126684 "Use the correct shift amount type". It is only the correct

2011-03-04 14:28:59 +00:00

LegalizeTypes.cpp

Move ExpandAtomic into the integer expansion routines - it's only used there.

2011-01-11 00:36:08 +00:00

LegalizeTypes.h

Revert r123908; the code in question is completely untested and wrong.

2011-03-03 22:33:23 +00:00

LegalizeTypesGeneric.cpp

Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.

2010-11-23 03:31:01 +00:00

LegalizeVectorOps.cpp

Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.

2010-11-23 03:31:01 +00:00

LegalizeVectorTypes.cpp

Add a few missed unary cases when legalizing vector results. Put some cases

2011-03-01 15:15:43 +00:00

Makefile

…

ScheduleDAGFast.cpp

Re-commit 127368 and 127371. They are exonerated.

2011-03-10 00:16:32 +00:00

ScheduleDAGList.cpp

Various bits of framework needed for precise machine-level selection

2010-12-24 05:03:26 +00:00

ScheduleDAGRRList.cpp

Re-commit 127368 and 127371. They are exonerated.

2011-03-10 00:16:32 +00:00

ScheduleDAGSDNodes.cpp

Improve pre-RA-sched register pressure tracking for duplicate operands.

2011-03-09 19:12:43 +00:00

ScheduleDAGSDNodes.h

Introducing a new method of tracking register pressure. We can't

2011-02-04 03:18:17 +00:00

SDNodeDbgValue.h

Do not lose debug info of an inlined function argument even if the argument is only used through GEPs.

2011-02-18 22:43:42 +00:00

SDNodeOrdering.h

…

SelectionDAG.cpp

sext(undef) = 0, because the top bits will all be the same.

2011-03-15 02:22:10 +00:00

SelectionDAGBuilder.cpp

Move more logic into getTypeForExtArgOrReturn.

2011-03-17 14:53:37 +00:00

SelectionDAGBuilder.h

Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."

2011-02-21 23:21:26 +00:00

SelectionDAGISel.cpp

trailing whitespace.

2011-03-01 01:39:05 +00:00

SelectionDAGPrinter.cpp

Pass the graph to the DOTGraphTraits.getEdgeAttributes().

2011-02-27 04:11:03 +00:00

TargetLowering.cpp

BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift.

2011-03-17 20:39:14 +00:00

TargetSelectionDAGInfo.cpp

Implement a bunch more TargetSelectionDAGInfo infrastructure.

2010-05-11 17:31:57 +00:00