llvm-6502/test/CodeGen
Andrew Trick 1c3af779fc Thumb2 and ARM add/subtract with carry fixes.
Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>.
t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the
assembly printer correctly prints the 's' suffix.

Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags.

Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS.
Fixes ARM SBC lowering to check for live carry (potential bug).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 03:55:32 +00:00
..
Alpha
ARM Thumb2 and ARM add/subtract with carry fixes. 2011-04-23 03:55:32 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Un-XFAIL this test for ARM. <rdar://problem/7662569> 2011-04-20 21:47:45 +00:00
MBlaze
Mips Make tests register allocation independent again. 2011-04-19 00:14:43 +00:00
MSP430
PowerPC
PTX ptx: fix parameter ordering 2011-04-21 10:56:58 +00:00
SPARC
SystemZ
Thumb Make tests register allocation independent again. 2011-04-19 00:14:43 +00:00
Thumb2 Thumb2 and ARM add/subtract with carry fixes. 2011-04-23 03:55:32 +00:00
X86 test/CodeGen/X86/shrink-compare.ll: Relax expressions for Win64. 2011-04-23 00:15:45 +00:00
XCore