Juergen Ributzka 1c8595529b Transfer implicit operands when expanding the RET_ReallyLR pseudo instruction. ...

When we expand the RET_ReallyLR pseudo instruction we also need to transfer the
implicit operands.

The return register is an implicit operand and without it the liveness
calculation generates an incorrect live-out set for the patchpoint.

This fixes rdar://problem/19068476.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233635 91177308-0d34-0410-b5e6-96231b3b80d8

2015-03-30 22:45:56 +00:00

..

AArch64

Transfer implicit operands when expanding the RET_ReallyLR pseudo instruction.

2015-03-30 22:45:56 +00:00

ARM

[ARM] Enable changing instprinter's behavior based on the per-function

2015-03-27 23:41:42 +00:00

BPF

[bpf] add support for bswap instructions

2015-03-30 22:40:40 +00:00

CPP

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Generic

LLParser: Require non-null scope for MDLocation and MDLocalVariable

2015-03-27 17:56:39 +00:00

Hexagon

[Hexagon] Add support for vector instructions

2015-03-19 16:33:08 +00:00

Inputs

DebugInfo: Fix bad debug info for compile units and types

2015-03-27 20:46:33 +00:00

Mips

[mips] Support 9-bit offsets for the 'R' inline assembly memory constraint.

2015-03-30 13:27:25 +00:00

MSP430

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NVPTX

[NVPTX] Associate a minimum PTX version for each SM architecture

2015-03-30 19:30:55 +00:00

PowerPC

DebugInfo: Fix bad debug info for compile units and types

2015-03-27 20:46:33 +00:00

R600

[R600/SI] Fix testcase check line.

2015-03-27 20:41:42 +00:00

SPARC

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SystemZ

[SystemZ] Fix LLVM crash on unoptimized code

2015-03-30 13:46:59 +00:00

Thumb

DebugInfo: Fix bad debug info for compile units and types

2015-03-27 20:46:33 +00:00

Thumb2

Fix a nasty bug in DAGCombine of STORE nodes.

2015-03-19 22:48:57 +00:00

WinEH

WinEH: Create a parent frame alloca for HandlerType xdata tables

2015-03-27 04:17:07 +00:00

X86

Verify 'optnone' can run DAG combiner when appropriate.

2015-03-30 19:37:44 +00:00

XCore

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