Matt Arsenault 1cc41bf63c R600: Fix trunc i64 to i32 on SI ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192375 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-10 18:04:16 +00:00

..

AArch64

Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

2013-10-10 17:00:52 +00:00

ARM

ARM: correct liveness flags during ARMLoadStoreOpt

2013-10-10 09:28:20 +00:00

CPP

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

Generic

Change objectsize intrinsic to accept different address spaces.

2013-10-07 18:06:48 +00:00

Hexagon

TBAA: remove !tbaa from testing cases when they are not needed.

2013-09-30 18:17:35 +00:00

Inputs

Debug Info: add an identifier field to DICompositeType.

2013-08-26 22:39:55 +00:00

Mips

[mips] Do not generate INS/EXT nodes if target does not have support for

2013-10-09 23:36:17 +00:00

MSP430

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

NVPTX

[NVPTX] Make constant vector test case endian-independent

2013-09-19 13:14:44 +00:00

PowerPC

TBAA: update tbaa format from scalar format to struct-path aware format.

2013-09-30 18:17:55 +00:00

R600

R600: Fix trunc i64 to i32 on SI

2013-10-10 18:04:16 +00:00

SPARC

[Sparc] Disable tail call optimization for sparc64.

2013-10-09 12:50:39 +00:00

SystemZ

[SystemZ] Add comparisons of high words and memory

2013-10-01 15:00:44 +00:00

Thumb

ARM: Use "dmb sy" for barriers on M-class CPUs

2013-08-28 14:39:19 +00:00

Thumb2

Fix spelling intruction -> instruction.

2013-09-28 11:46:15 +00:00

X86

Disable function padding to get this test to pass on atom.

2013-10-10 12:46:23 +00:00

XCore

XCore handling of thread local lowering

2013-09-09 10:42:11 +00:00