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1d8973b499c3fa5d6d85c83316a49d1dc28a1c62
llvm-6502/test/CodeGen
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Bill Wendling 3180e20cda Fix for first part of PR2562. Generate the "pinsrw" instruction for inserts
into v4i16 vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53807 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-20 02:32:23 +00:00
..
Alpha
Don't try to compile tests for the ev56 alpha subtarget, which hasn't been
2008-06-12 13:44:26 +00:00
ARM
Softfloat support for FDIV. Patch by
2008-07-18 21:18:48 +00:00
CBackend
In the CBackend, use casts to force integer add, subtract, and
2008-07-18 18:43:12 +00:00
CellSPU
Add necessary 64-bit support so that gcc frontend compiles (mostly). Current
2008-06-02 22:18:03 +00:00
CPP
Put CPPBackend tests into their own directory and run them only if they're
2008-07-10 22:35:32 +00:00
Generic
Turn LegalizeTypes back off again for the moment:
2008-07-17 17:06:03 +00:00
IA64
sabre brings to my attention that the 'tr' suffix is also obsolete
2008-05-20 21:00:03 +00:00
PowerPC
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
2008-07-17 19:10:17 +00:00
SPARC
sabre brings to my attention that the 'tr' suffix is also obsolete
2008-05-20 21:00:03 +00:00
X86
Fix for first part of PR2562. Generate the "pinsrw" instruction for inserts
2008-07-20 02:32:23 +00:00
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