Artyom Skrobov 3767c7446e [ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-optional: it should have the default value of AllowDIVIfExists ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199638 91177308-0d34-0410-b5e6-96231b3b80d8

2014-01-20 10:18:42 +00:00

..

AArch64

Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."

2014-01-20 08:18:01 +00:00

ARM

[ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-optional: it should have the default value of AllowDIVIfExists

2014-01-20 10:18:42 +00:00

CPP

Begin adding docs and IR-level support for the inalloca attribute

2013-12-19 02:14:12 +00:00

Generic

Remove a failing test to get the buildbots back to green.

2014-01-06 00:43:09 +00:00

Hexagon

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Inputs

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Mips

[mips][msa] Correct pattern for LSA

2014-01-17 15:40:05 +00:00

MSP430

Make sure SP is always aligned on a 2 byte boundary

2013-10-24 09:32:31 +00:00

NVPTX

Fix non-deterministic SDNodeOrder-dependent codegen

2014-01-12 14:09:17 +00:00

PowerPC

Implement initial-exec TLS for PPC32.

2013-12-20 18:08:54 +00:00

R600

Fix broken CHECK lines.

2014-01-11 21:06:00 +00:00

SPARC

Always let value types influence register classes.

2014-01-14 06:18:38 +00:00

SystemZ

[SystemZ] Flesh out stackrestore test (frame-11.ll)

2014-01-13 15:44:44 +00:00

Thumb

Fix broken CHECK lines.

2014-01-11 21:06:00 +00:00

Thumb2

Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks

2014-01-13 18:47:54 +00:00

X86

Add two new calling conventions for runtime calls

2014-01-17 19:47:03 +00:00

XCore

Fix broken CHECK lines.

2014-01-11 21:06:00 +00:00