Rafael Espindola 1dd4d5f760 Convert test to FileCheck. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200955 91177308-0d34-0410-b5e6-96231b3b80d8

2014-02-06 23:35:22 +00:00

..

AArch64

ARM & AArch64: merge NEON absolute compare intrinsics

2014-02-04 14:55:42 +00:00

ARM

Fix PR18345: ldr= pseudo instruction produces incorrect code when using in inline assembly

2014-02-04 17:22:40 +00:00

CPP

Begin adding docs and IR-level support for the inalloca attribute

2013-12-19 02:14:12 +00:00

Generic

[DAG] Don't pull the binary operation though the shift if the operands have opaque constants.

2014-02-06 04:09:06 +00:00

Hexagon

DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0}

2014-02-04 01:23:52 +00:00

Inputs

…

Mips

[mips] Add NaCl target and forbid indexed loads and stores for it

2014-02-05 17:19:30 +00:00

MSP430

Fix known typos

2014-01-24 17:20:08 +00:00

NVPTX

[NVPTX] Fix emitting aggregate parameters

2014-01-28 18:35:29 +00:00

PowerPC

Convert test to FileCheck.

2014-02-06 23:35:22 +00:00

R600

R600/SI: Add a MUBUF store pattern for Reg+Imm offsets

2014-02-06 18:36:41 +00:00

SPARC

[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.

2014-02-01 18:54:16 +00:00

SystemZ

XFAIL test/CodeGen/SystemZ/alias-01.ll which requires CodeGen TBAA

2014-01-25 19:31:44 +00:00

Thumb

CodeGen: Stop treating vectors as aggregates

2014-01-21 22:46:46 +00:00

Thumb2

PGO branch weight: update edge weights in IfConverter.

2014-01-29 23:18:47 +00:00

X86

[CodeGenPrepare] Move away sign extensions that get in the way of addressing

2014-02-06 21:44:56 +00:00

XCore

Fix broken CHECK lines.

2014-01-11 21:06:00 +00:00