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328da65bd1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54844 91177308-0d34-0410-b5e6-96231b3b80d8
51 lines
1.6 KiB
C++
51 lines
1.6 KiB
C++
//===-- SparcTargetAsmInfo.cpp - Sparc asm properties -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declarations of the SparcTargetAsmInfo properties.
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//
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//===----------------------------------------------------------------------===//
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#include "SparcTargetAsmInfo.h"
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using namespace llvm;
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SparcELFTargetAsmInfo::SparcELFTargetAsmInfo(const TargetMachine &TM):
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ELFTargetAsmInfo(TM) {
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Data16bitsDirective = "\t.half\t";
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Data32bitsDirective = "\t.word\t";
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Data64bitsDirective = 0; // .xword is only supported by V9.
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ZeroDirective = "\t.skip\t";
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CommentString = "!";
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ConstantPoolSection = "\t.section \".rodata\",#alloc\n";
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COMMDirectiveTakesAlignment = true;
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CStringSection=".rodata.str";
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// Sparc normally uses named section for BSS.
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BSSSection_ = getNamedSection("\t.bss",
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SectionFlags::Writeable | SectionFlags::BSS,
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/* Override */ true);
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}
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std::string SparcELFTargetAsmInfo::printSectionFlags(unsigned flags) const {
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if (flags & SectionFlags::Mergeable)
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return ELFTargetAsmInfo::printSectionFlags(flags);
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std::string Flags;
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if (!(flags & SectionFlags::Debug))
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Flags += ",#alloc";
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if (flags & SectionFlags::Code)
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Flags += ",#execinstr";
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if (flags & SectionFlags::Writeable)
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Flags += ",#write";
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if (flags & SectionFlags::TLS)
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Flags += ",#tls";
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return Flags;
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}
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