Files
llvm-6502/utils/TableGen/FastISelEmitter.cpp
Eric Christopher 53452606ca Allow strict subclasses of register classes, this way we can handle
ARM instructions with:

foo GPR, rGPR

which happens a lot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112025 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 04:58:56 +00:00

22 KiB