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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207196 91177308-0d34-0410-b5e6-96231b3b80d8
49 lines
1.6 KiB
C++
49 lines
1.6 KiB
C++
//===- PromoteMemToReg.h - Promote Allocas to Scalars -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file exposes an interface to promote alloca instructions to SSA
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// registers, by using the SSA construction algorithm.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_UTILS_PROMOTEMEMTOREG_H
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#define LLVM_TRANSFORMS_UTILS_PROMOTEMEMTOREG_H
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#include "llvm/ADT/ArrayRef.h"
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namespace llvm {
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class AllocaInst;
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class DominatorTree;
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class AliasSetTracker;
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/// \brief Return true if this alloca is legal for promotion.
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///
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/// This is true if there are only loads, stores, and lifetime markers
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/// (transitively) using this alloca. This also enforces that there is only
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/// ever one layer of bitcasts or GEPs between the alloca and the lifetime
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/// markers.
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bool isAllocaPromotable(const AllocaInst *AI);
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/// \brief Promote the specified list of alloca instructions into scalar
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/// registers, inserting PHI nodes as appropriate.
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///
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/// This function makes use of DominanceFrontier information. This function
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/// does not modify the CFG of the function at all. All allocas must be from
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/// the same function.
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///
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/// If AST is specified, the specified tracker is updated to reflect changes
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/// made to the IR.
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void PromoteMemToReg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT,
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AliasSetTracker *AST = nullptr);
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} // End llvm namespace
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#endif
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