mirror of
https://github.com/c64scene-ar/llvm-6502.git
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9899f70a74
code. It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.
Also removed hacky #define-controlled initialization
of targets in edis. If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101179 91177308-0d34-0410-b5e6-96231b3b80d8
100 lines
2.5 KiB
C++
100 lines
2.5 KiB
C++
//===- ARMDisassembler.h - Disassembler for ARM/Thumb ISA -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is part of the ARM Disassembler.
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// It contains the header for ARMDisassembler and ThumbDisassembler, both are
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// subclasses of MCDisassembler.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARMDISASSEMBLER_H
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#define ARMDISASSEMBLER_H
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#include "llvm/MC/MCDisassembler.h"
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namespace llvm {
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class MCInst;
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class MemoryObject;
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class raw_ostream;
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struct EDInstInfo;
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/// ARMDisassembler - ARM disassembler for all ARM platforms.
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class ARMDisassembler : public MCDisassembler {
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public:
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/// Constructor - Initializes the disassembler.
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///
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ARMDisassembler() :
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MCDisassembler() {
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}
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~ARMDisassembler() {
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}
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/// getInstruction - See MCDisassembler.
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bool getInstruction(MCInst &instr,
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uint64_t &size,
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const MemoryObject ®ion,
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uint64_t address,
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raw_ostream &vStream) const;
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/// getEDInfo - See MCDisassembler.
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EDInstInfo *getEDInfo() const;
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private:
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};
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// Forward declaration.
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class ARMBasicMCBuilder;
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/// Session - Keep track of the IT Block progression.
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class Session {
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friend class ARMBasicMCBuilder;
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public:
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Session() : ITCounter(0), ITState(0) {}
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~Session() {}
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/// InitIT - Initializes ITCounter/ITState.
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void InitIT(unsigned short bits7_0);
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/// UpdateIT - Updates ITCounter/ITState as IT Block progresses.
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void UpdateIT();
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private:
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unsigned ITCounter; // Possible values: 0, 1, 2, 3, 4.
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unsigned ITState; // A2.5.2 Consists of IT[7:5] and IT[4:0] initially.
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};
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/// ThumbDisassembler - Thumb disassembler for all ARM platforms.
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class ThumbDisassembler : public MCDisassembler {
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public:
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/// Constructor - Initializes the disassembler.
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///
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ThumbDisassembler() :
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MCDisassembler(), SO() {
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}
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~ThumbDisassembler() {
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}
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/// getInstruction - See MCDisassembler.
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bool getInstruction(MCInst &instr,
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uint64_t &size,
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const MemoryObject ®ion,
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uint64_t address,
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raw_ostream &vStream) const;
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/// getEDInfo - See MCDisassembler.
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EDInstInfo *getEDInfo() const;
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private:
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Session SO;
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};
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} // namespace llvm
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#endif
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