mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-10 02:36:06 +00:00
1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
109 lines
4.3 KiB
LLVM
109 lines
4.3 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
|
|
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
|
|
|
|
declare i32 @llvm.r600.read.tidig.x() #1
|
|
|
|
; FUNC-LABEL: @test_fmax_legacy_uge_f32
|
|
; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
|
|
; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
|
|
; SI: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
|
|
; EG: MAX
|
|
define void @test_fmax_legacy_uge_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() #1
|
|
%gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
|
|
%gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
|
|
|
|
%a = load float addrspace(1)* %gep.0, align 4
|
|
%b = load float addrspace(1)* %gep.1, align 4
|
|
|
|
%cmp = fcmp uge float %a, %b
|
|
%val = select i1 %cmp, float %a, float %b
|
|
store float %val, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: @test_fmax_legacy_oge_f32
|
|
; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
|
|
; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
|
|
; SI: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
|
|
; EG: MAX
|
|
define void @test_fmax_legacy_oge_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() #1
|
|
%gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
|
|
%gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
|
|
|
|
%a = load float addrspace(1)* %gep.0, align 4
|
|
%b = load float addrspace(1)* %gep.1, align 4
|
|
|
|
%cmp = fcmp oge float %a, %b
|
|
%val = select i1 %cmp, float %a, float %b
|
|
store float %val, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: @test_fmax_legacy_ugt_f32
|
|
; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
|
|
; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
|
|
; SI: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
|
|
; EG: MAX
|
|
define void @test_fmax_legacy_ugt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() #1
|
|
%gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
|
|
%gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
|
|
|
|
%a = load float addrspace(1)* %gep.0, align 4
|
|
%b = load float addrspace(1)* %gep.1, align 4
|
|
|
|
%cmp = fcmp ugt float %a, %b
|
|
%val = select i1 %cmp, float %a, float %b
|
|
store float %val, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: @test_fmax_legacy_ogt_f32
|
|
; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
|
|
; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
|
|
; SI: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
|
|
; EG: MAX
|
|
define void @test_fmax_legacy_ogt_f32(float addrspace(1)* %out, float addrspace(1)* %in) #0 {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() #1
|
|
%gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
|
|
%gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
|
|
|
|
%a = load float addrspace(1)* %gep.0, align 4
|
|
%b = load float addrspace(1)* %gep.1, align 4
|
|
|
|
%cmp = fcmp ogt float %a, %b
|
|
%val = select i1 %cmp, float %a, float %b
|
|
store float %val, float addrspace(1)* %out, align 4
|
|
ret void
|
|
}
|
|
|
|
|
|
; FUNC-LABEL: @test_fmax_legacy_ogt_f32_multi_use
|
|
; SI: buffer_load_dword [[A:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}
|
|
; SI: buffer_load_dword [[B:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4
|
|
; SI-NOT: v_max_
|
|
; SI: v_cmp_gt_f32
|
|
; SI-NEXT: v_cndmask_b32
|
|
; SI-NOT: v_max_
|
|
|
|
; EG: MAX
|
|
define void @test_fmax_legacy_ogt_f32_multi_use(float addrspace(1)* %out0, i1 addrspace(1)* %out1, float addrspace(1)* %in) #0 {
|
|
%tid = call i32 @llvm.r600.read.tidig.x() #1
|
|
%gep.0 = getelementptr float addrspace(1)* %in, i32 %tid
|
|
%gep.1 = getelementptr float addrspace(1)* %gep.0, i32 1
|
|
|
|
%a = load float addrspace(1)* %gep.0, align 4
|
|
%b = load float addrspace(1)* %gep.1, align 4
|
|
|
|
%cmp = fcmp ogt float %a, %b
|
|
%val = select i1 %cmp, float %a, float %b
|
|
store float %val, float addrspace(1)* %out0, align 4
|
|
store i1 %cmp, i1addrspace(1)* %out1
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { nounwind }
|
|
attributes #1 = { nounwind readnone }
|