mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-10 02:36:06 +00:00
1f996fa36b
This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225277 91177308-0d34-0410-b5e6-96231b3b80d8
474 lines
17 KiB
LLVM
474 lines
17 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI %s
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; FUNC-LABEL: {{^}}lds_atomic_xchg_ret_i64:
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; SI: ds_wrxchg_rtn_b64
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; SI: s_endpgm
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define void @lds_atomic_xchg_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw xchg i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_xchg_ret_i64_offset:
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; SI: ds_wrxchg_rtn_b64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_xchg_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw xchg i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_add_ret_i64:
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; SI: ds_add_rtn_u64
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; SI: s_endpgm
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define void @lds_atomic_add_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw add i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_add_ret_i64_offset:
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; SI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
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; SI: s_mov_b64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, 9
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; SI-DAG: v_mov_b32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
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; SI-DAG: v_mov_b32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
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; SI-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
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; SI: ds_add_rtn_u64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}} offset:32 [M0]
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; SI: buffer_store_dwordx2 [[RESULT]],
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; SI: s_endpgm
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define void @lds_atomic_add_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i64 4
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%result = atomicrmw add i64 addrspace(3)* %gep, i64 9 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_inc_ret_i64:
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; SI: s_mov_b64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, -1
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; SI-DAG: v_mov_b32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
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; SI-DAG: v_mov_b32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
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; SI: ds_inc_rtn_u64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}}
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; SI: buffer_store_dwordx2 [[RESULT]],
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; SI: s_endpgm
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define void @lds_atomic_inc_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw add i64 addrspace(3)* %ptr, i64 1 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_inc_ret_i64_offset:
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; SI: ds_inc_rtn_u64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_inc_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw add i64 addrspace(3)* %gep, i64 1 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_sub_ret_i64:
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; SI: ds_sub_rtn_u64
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; SI: s_endpgm
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define void @lds_atomic_sub_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw sub i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_sub_ret_i64_offset:
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; SI: ds_sub_rtn_u64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_sub_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw sub i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_dec_ret_i64:
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; SI: s_mov_b64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, -1
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; SI-DAG: v_mov_b32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
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; SI-DAG: v_mov_b32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
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; SI: ds_dec_rtn_u64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}}
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; SI: buffer_store_dwordx2 [[RESULT]],
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; SI: s_endpgm
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define void @lds_atomic_dec_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw sub i64 addrspace(3)* %ptr, i64 1 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_dec_ret_i64_offset:
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; SI: ds_dec_rtn_u64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_dec_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw sub i64 addrspace(3)* %gep, i64 1 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_and_ret_i64:
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; SI: ds_and_rtn_b64
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; SI: s_endpgm
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define void @lds_atomic_and_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw and i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_and_ret_i64_offset:
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; SI: ds_and_rtn_b64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_and_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw and i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_or_ret_i64:
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; SI: ds_or_rtn_b64
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; SI: s_endpgm
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define void @lds_atomic_or_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw or i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_or_ret_i64_offset:
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; SI: ds_or_rtn_b64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_or_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw or i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_xor_ret_i64:
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; SI: ds_xor_rtn_b64
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; SI: s_endpgm
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define void @lds_atomic_xor_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw xor i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_xor_ret_i64_offset:
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; SI: ds_xor_rtn_b64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_xor_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw xor i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FIXME: There is no atomic nand instr
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; XFUNC-LABEL: {{^}}lds_atomic_nand_ret_i64:uction, so we somehow need to expand this.
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; define void @lds_atomic_nand_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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; %result = atomicrmw nand i64 addrspace(3)* %ptr, i32 4 seq_cst
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; store i64 %result, i64 addrspace(1)* %out, align 8
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; ret void
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; }
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; FUNC-LABEL: {{^}}lds_atomic_min_ret_i64:
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; SI: ds_min_rtn_i64
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; SI: s_endpgm
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define void @lds_atomic_min_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw min i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_min_ret_i64_offset:
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; SI: ds_min_rtn_i64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_min_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw min i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_max_ret_i64:
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; SI: ds_max_rtn_i64
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; SI: s_endpgm
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define void @lds_atomic_max_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw max i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_max_ret_i64_offset:
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; SI: ds_max_rtn_i64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_max_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw max i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_umin_ret_i64:
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; SI: ds_min_rtn_u64
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; SI: s_endpgm
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define void @lds_atomic_umin_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw umin i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_umin_ret_i64_offset:
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; SI: ds_min_rtn_u64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_umin_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw umin i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_umax_ret_i64:
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; SI: ds_max_rtn_u64
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; SI: s_endpgm
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define void @lds_atomic_umax_ret_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw umax i64 addrspace(3)* %ptr, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_umax_ret_i64_offset:
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; SI: ds_max_rtn_u64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_umax_ret_i64_offset(i64 addrspace(1)* %out, i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw umax i64 addrspace(3)* %gep, i64 4 seq_cst
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store i64 %result, i64 addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_xchg_noret_i64:
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; SI: ds_wrxchg_rtn_b64
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; SI: s_endpgm
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define void @lds_atomic_xchg_noret_i64(i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw xchg i64 addrspace(3)* %ptr, i64 4 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_xchg_noret_i64_offset:
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; SI: ds_wrxchg_rtn_b64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_xchg_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw xchg i64 addrspace(3)* %gep, i64 4 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_add_noret_i64:
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; SI: ds_add_u64
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; SI: s_endpgm
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define void @lds_atomic_add_noret_i64(i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw add i64 addrspace(3)* %ptr, i64 4 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_add_noret_i64_offset:
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; SI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
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; SI: s_mov_b64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, 9
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; SI-DAG: v_mov_b32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
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; SI-DAG: v_mov_b32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
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; SI-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
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; SI: ds_add_u64 [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}} offset:32 [M0]
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; SI: s_endpgm
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define void @lds_atomic_add_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i64 4
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%result = atomicrmw add i64 addrspace(3)* %gep, i64 9 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_inc_noret_i64:
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; SI: s_mov_b64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, -1
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; SI-DAG: v_mov_b32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
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; SI-DAG: v_mov_b32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
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; SI: ds_inc_u64 [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}}
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; SI: s_endpgm
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define void @lds_atomic_inc_noret_i64(i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw add i64 addrspace(3)* %ptr, i64 1 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_inc_noret_i64_offset:
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; SI: ds_inc_u64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_inc_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw add i64 addrspace(3)* %gep, i64 1 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_sub_noret_i64:
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; SI: ds_sub_u64
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; SI: s_endpgm
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define void @lds_atomic_sub_noret_i64(i64 addrspace(3)* %ptr) nounwind {
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%result = atomicrmw sub i64 addrspace(3)* %ptr, i64 4 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_sub_noret_i64_offset:
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; SI: ds_sub_u64 {{.*}} offset:32
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; SI: s_endpgm
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define void @lds_atomic_sub_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
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%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
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%result = atomicrmw sub i64 addrspace(3)* %gep, i64 4 seq_cst
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ret void
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}
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; FUNC-LABEL: {{^}}lds_atomic_dec_noret_i64:
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; SI: s_mov_b64 s{{\[}}[[LOSDATA:[0-9]+]]:[[HISDATA:[0-9]+]]{{\]}}, -1
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; SI-DAG: v_mov_b32_e32 v[[LOVDATA:[0-9]+]], s[[LOSDATA]]
|
|
; SI-DAG: v_mov_b32_e32 v[[HIVDATA:[0-9]+]], s[[HISDATA]]
|
|
; SI: ds_dec_u64 [[VPTR]], v{{\[}}[[LOVDATA]]:[[HIVDATA]]{{\]}}
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_dec_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw sub i64 addrspace(3)* %ptr, i64 1 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_dec_noret_i64_offset:
|
|
; SI: ds_dec_u64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_dec_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw sub i64 addrspace(3)* %gep, i64 1 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_and_noret_i64:
|
|
; SI: ds_and_b64
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_and_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw and i64 addrspace(3)* %ptr, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_and_noret_i64_offset:
|
|
; SI: ds_and_b64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_and_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw and i64 addrspace(3)* %gep, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_or_noret_i64:
|
|
; SI: ds_or_b64
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_or_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw or i64 addrspace(3)* %ptr, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_or_noret_i64_offset:
|
|
; SI: ds_or_b64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_or_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw or i64 addrspace(3)* %gep, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_xor_noret_i64:
|
|
; SI: ds_xor_b64
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_xor_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw xor i64 addrspace(3)* %ptr, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_xor_noret_i64_offset:
|
|
; SI: ds_xor_b64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_xor_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw xor i64 addrspace(3)* %gep, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FIXME: There is no atomic nand instr
|
|
; XFUNC-LABEL: {{^}}lds_atomic_nand_noret_i64:uction, so we somehow need to expand this.
|
|
; define void @lds_atomic_nand_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
; %result = atomicrmw nand i64 addrspace(3)* %ptr, i32 4 seq_cst
|
|
; ret void
|
|
; }
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_min_noret_i64:
|
|
; SI: ds_min_i64
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_min_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw min i64 addrspace(3)* %ptr, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_min_noret_i64_offset:
|
|
; SI: ds_min_i64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_min_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw min i64 addrspace(3)* %gep, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_max_noret_i64:
|
|
; SI: ds_max_i64
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_max_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw max i64 addrspace(3)* %ptr, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_max_noret_i64_offset:
|
|
; SI: ds_max_i64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_max_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw max i64 addrspace(3)* %gep, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_umin_noret_i64:
|
|
; SI: ds_min_u64
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_umin_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw umin i64 addrspace(3)* %ptr, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_umin_noret_i64_offset:
|
|
; SI: ds_min_u64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_umin_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw umin i64 addrspace(3)* %gep, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_umax_noret_i64:
|
|
; SI: ds_max_u64
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_umax_noret_i64(i64 addrspace(3)* %ptr) nounwind {
|
|
%result = atomicrmw umax i64 addrspace(3)* %ptr, i64 4 seq_cst
|
|
ret void
|
|
}
|
|
|
|
; FUNC-LABEL: {{^}}lds_atomic_umax_noret_i64_offset:
|
|
; SI: ds_max_u64 {{.*}} offset:32
|
|
; SI: s_endpgm
|
|
define void @lds_atomic_umax_noret_i64_offset(i64 addrspace(3)* %ptr) nounwind {
|
|
%gep = getelementptr i64 addrspace(3)* %ptr, i32 4
|
|
%result = atomicrmw umax i64 addrspace(3)* %gep, i64 4 seq_cst
|
|
ret void
|
|
}
|