llvm-6502/test/CodeGen
Elena Demikhovsky 0d5d656524 AVX-512: insert element to mask vector; store i1 data
Implemented INSERT_VECTOR_ELT operation for v16i1 and v8i1 vectors;
Implemented "store" for i1 type


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205850 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 12:37:50 +00:00
..
AArch64 [AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS 2014-03-27 16:28:09 +00:00
ARM ARM: yet another round of ARM test clean ups 2014-04-03 23:47:24 +00:00
ARM64 ARM64: scalarize v1i64 mul operation 2014-04-09 07:07:02 +00:00
CPP
Generic
Hexagon
Inputs
Mips Re-commit: [mips] abs.[ds], and neg.[ds] should be allowed regardless of -enable-no-nans-fp-math 2014-04-09 09:56:43 +00:00
MSP430 Mark FPB as a reserved register when needed. 2014-04-02 13:13:56 +00:00
NVPTX Optimize away unnecessary address casts. 2014-04-03 21:18:25 +00:00
PowerPC [PowerPC] Add a full condition code register to make the "cc" clobber work 2014-04-04 15:15:57 +00:00
R600 R600/SI: Match not instruction. 2014-04-09 07:16:16 +00:00
SPARC
SystemZ
Thumb ARM: yet another round of ARM test clean ups 2014-04-03 23:47:24 +00:00
Thumb2 ARM: fix test case missed in previous roundup 2014-04-04 01:19:56 +00:00
X86 AVX-512: insert element to mask vector; store i1 data 2014-04-09 12:37:50 +00:00
XCore