Andrea Di Biagio 217cd18656 [DAGCombiner] Avoid calling method 'isShuffleMaskLegal' on illegal vector types. ...

This patch fixes a crasher in method 'DAGCombiner::visitOR' due to an invalid
call to method 'isShuffleMaskLegal'. On x86, method 'isShuffleMaskLegal'
always expects a legal vector value type in input.

With this patch, we immediately check if the input OR dag node has a legal
vector type; we only try to fold a OR dag node into a single shufflevector
if we know that the resulting shuffle will have a legal type.
This is to avoid calling method 'isShuffleMaskLegal' on a potentially
illegal vector value type.

Added a new test-case to file 'CodeGen/X86/combine-or.ll' to verify that
DAGCombiner doesn't crash in the attempt to check/combine an OR between shuffles
with illegal types.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213020 91177308-0d34-0410-b5e6-96231b3b80d8

2014-07-15 00:02:32 +00:00

..

CMakeLists.txt

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DAGCombiner.cpp

[DAGCombiner] Avoid calling method 'isShuffleMaskLegal' on illegal vector types.

2014-07-15 00:02:32 +00:00

FastISel.cpp

Avoid a warning from MSVC on "*/" in this code by inserting a space

2014-07-12 00:06:46 +00:00

FunctionLoweringInfo.cpp

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InstrEmitter.cpp

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InstrEmitter.h

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LegalizeDAG.cpp

ARM: Allow __fp16 as a function arg or return type for AArch64

2014-07-11 13:33:46 +00:00

LegalizeFloatTypes.cpp

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LegalizeIntegerTypes.cpp

Make it possible for ints/floats to return different values from getBooleanContents()

2014-07-10 10:18:12 +00:00

LegalizeTypes.cpp

Make it possible for ints/floats to return different values from getBooleanContents()

2014-07-10 10:18:12 +00:00

LegalizeTypes.h

[x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous

2014-07-10 12:32:32 +00:00

LegalizeTypesGeneric.cpp

Fix ppcf128 component access on little-endian systems

2014-07-03 15:06:47 +00:00

LegalizeVectorOps.cpp

[x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous

2014-07-10 12:32:32 +00:00

LegalizeVectorTypes.cpp

[x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous

2014-07-10 12:32:32 +00:00

LLVMBuild.txt

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Makefile

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ResourcePriorityQueue.cpp

Fix 'platform-specific' hyphenations

2014-06-30 18:57:16 +00:00

ScheduleDAGFast.cpp

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ScheduleDAGRRList.cpp

fixed typo

2014-07-14 18:21:07 +00:00

ScheduleDAGSDNodes.cpp

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ScheduleDAGSDNodes.h

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ScheduleDAGVLIW.cpp

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SDNodeDbgValue.h

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SelectionDAG.cpp

[x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous

2014-07-10 12:32:32 +00:00

SelectionDAGBuilder.cpp

[FastISel] Make isInTailCallPosition independent of SelectionDAG.

2014-07-11 20:50:47 +00:00

SelectionDAGBuilder.h

Fix 'platform-specific' hyphenations

2014-06-30 18:57:16 +00:00

SelectionDAGDumper.cpp

[x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous

2014-07-10 12:32:32 +00:00

SelectionDAGISel.cpp

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SelectionDAGPrinter.cpp

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TargetLowering.cpp

SelectionDAG: Factor FP_TO_SINT lower code out of DAGLegalizer

2014-07-10 22:40:18 +00:00

TargetSelectionDAGInfo.cpp

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