Tom Stellard 22274378d5 R600/SI: Use immediates offsets for SMRD instructions whenever possible ... There was a problem with the old pattern, so we were copying some larger immediates into registers when we could have been encoding them in the instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200932 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-06 18:36:34 +00:00
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AArch64	ARM & AArch64: merge NEON absolute compare intrinsics	2014-02-04 14:55:42 +00:00
ARM	Fix PR18345: ldr= pseudo instruction produces incorrect code when using in inline assembly	2014-02-04 17:22:40 +00:00
CPP
Generic	[DAG] Don't pull the binary operation though the shift if the operands have opaque constants.	2014-02-06 04:09:06 +00:00
Hexagon	DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0}	2014-02-04 01:23:52 +00:00
Inputs
Mips	[mips] Add NaCl target and forbid indexed loads and stores for it	2014-02-05 17:19:30 +00:00
MSP430
NVPTX
PowerPC	DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0}	2014-02-04 01:23:52 +00:00
R600	R600/SI: Use immediates offsets for SMRD instructions whenever possible	2014-02-06 18:36:34 +00:00
SPARC
SystemZ	XFAIL test/CodeGen/SystemZ/alias-01.ll which requires CodeGen TBAA	2014-01-25 19:31:44 +00:00
Thumb
Thumb2
X86	[RegAlloc] Add a last chance recoloring mechanism when everything else failed to	2014-02-05 22:13:59 +00:00
XCore