Michael J. Spencer 4935833df5 [x86] Fold extract_vector_elt of a load into the Load's address computation. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215409 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-11 23:49:33 +00:00

..

AArch64

[AArch64] Fix registerAllocator assigns same register for base and wback in

2014-08-11 21:39:53 +00:00

ARM

ARM: try harder to detect non-IT eligible instructions

2014-08-11 20:13:25 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

Use "weak alias" instead of "alias weak"

2014-07-30 22:51:54 +00:00

Hexagon

DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.

2014-08-06 00:21:25 +00:00

Inputs

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Mips

Add support for scalarizing cttz_zero_undef

2014-08-10 22:49:54 +00:00

MSP430

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NVPTX

[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types

2014-07-23 20:23:49 +00:00

PowerPC

Provide an implementation of getNoopForMachoTarget for PPC, otherwise

2014-08-08 19:13:23 +00:00

R600

R600/SI: Add a ComplexPattern for selecting MUBUF _OFFSET variant

2014-08-11 22:18:17 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly

2014-08-02 05:40:40 +00:00

Thumb2

ARM: do not generate BLX instructions on Cortex-M CPUs.

2014-08-06 11:13:14 +00:00

X86

[x86] Fold extract_vector_elt of a load into the Load's address computation.

2014-08-11 23:49:33 +00:00

XCore

llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.

2014-07-04 11:58:03 +00:00