llvm-6502/test/CodeGen
Akira Hatanaka 23bb38f034 MIPS DSP: SHLL.QB instruction sub-class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 19:05:08 +00:00
..
ARM [arm-fast-isel] Add support for ELF PIC. 2012-09-27 05:21:41 +00:00
CellSPU
CPP
Generic
Hexagon LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the 2012-09-05 16:01:40 +00:00
MBlaze
Mips MIPS DSP: SHLL.QB instruction sub-class. 2012-09-27 19:05:08 +00:00
MSP430
NVPTX
PowerPC Specify MachinePointerInfo as refering to the argument value and offset of the 2012-09-24 20:47:19 +00:00
SPARC Move load_to_switch.ll to test/CodeGen/SPARC/ 2012-09-19 09:25:03 +00:00
Thumb Fix Thumb2 fixup kind in the integrated-as. 2012-09-01 15:06:36 +00:00
Thumb2 Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte 2012-09-18 01:42:45 +00:00
X86 Avoid dereferencing a NULL pointer. 2012-09-27 16:34:19 +00:00
XCore