Matt Arsenault 24463c7df7 R600/SI: Remove redundant setting of instruction bits ...

These are all set on the instruction base classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220091 91177308-0d34-0410-b5e6-96231b3b80d8

2014-10-17 21:13:11 +00:00

..

Analysis

[LVI] Add some additional comments about caching and context instructions

2014-10-16 00:40:05 +00:00

AsmParser

Make CallingConv::ID an alias of "unsigned".

2014-09-10 18:00:17 +00:00

Bitcode

correct const-ness with auto and dyn_cast

2014-10-15 17:45:13 +00:00

CodeGen

[Stackmaps] Enable invoking the patchpoint intrinsic.

2014-10-17 17:39:00 +00:00

DebugInfo

Add couple of missing 'override' keyword. NFC.

2014-10-10 17:34:30 +00:00

ExecutionEngine

[MCJIT] Replace memcpy with readBytesUnaligned in RuntimeDyldMachOI386.

2014-10-10 23:07:09 +00:00

IR

[Stackmaps] Enable invoking the patchpoint intrinsic.

2014-10-17 17:39:00 +00:00

IRReader

Pass a && to getLazyBitcodeModule.

2014-09-03 17:31:46 +00:00

LineEditor

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Linker

Merge alignment of common GlobalValue.

2014-09-09 17:48:18 +00:00

LTO

LTO: Document the Boolean argument from r218784

2014-10-02 21:11:04 +00:00

MC

Add back commits r219835 and a fixed version of r219829.

2014-10-17 01:48:58 +00:00

Object

Add MachOObjectFile::getUuid()

2014-10-15 23:35:45 +00:00

Option

Add an overload of getLastArgNoClaim taking two OptSpecifiers.

2014-09-12 19:42:53 +00:00

ProfileData

Reduce double set lookups. NFC.

2014-10-10 15:32:50 +00:00

Support

Introduce LLVMParseCommandLineOptions C API function.

2014-10-16 22:47:52 +00:00

TableGen

Eliminate some deep std::vector copies. NFC.

2014-10-03 18:33:16 +00:00

Target

R600/SI: Remove redundant setting of instruction bits

2014-10-17 21:13:11 +00:00

Transforms

[DSE] Remove no-data-layout-only type-based overlap checking

2014-10-17 11:56:00 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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