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llvm-6502/include/llvm/Target
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Devang Patel 24f20e0832 Record variable debug info at ISel time directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22 17:12:53 +00:00
..
COFFTargetAsmInfo.h
…
DarwinTargetAsmInfo.h
Revert 78892 and 78895, these break generating working executables on
2009-08-13 17:03:38 +00:00
SubtargetFeature.h
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Target.td
Add 'isCodeGenOnly' bit to Instruction .td records.
2009-08-11 22:17:52 +00:00
TargetAsmInfo.h
Remove HasCrazyBSS and add a flag in TAI to indicate that '.section'
2009-08-13 23:30:21 +00:00
TargetAsmParser.h
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TargetCallingConv.td
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TargetData.h
Try again at privatizing the layout info map, with a rewritten patch.
2009-08-21 19:59:12 +00:00
TargetELFWriterInfo.h
- Remove custom handling of jumptables by the elf writter (this was
2009-08-05 06:57:03 +00:00
TargetFrameInfo.h
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TargetInstrDesc.h
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TargetInstrInfo.h
Record variable debug info at ISel time directly.
2009-08-22 17:12:53 +00:00
TargetInstrItineraries.h
Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.
2009-08-19 16:08:58 +00:00
TargetIntrinsicInfo.h
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TargetJITInfo.h
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TargetLowering.h
Reapply r79127. It was fixed by d0k.
2009-08-15 21:21:19 +00:00
TargetLoweringObjectFile.h
Remove HasCrazyBSS and add a flag in TAI to indicate that '.section'
2009-08-13 23:30:21 +00:00
TargetMachine.h
Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
2009-08-12 07:22:17 +00:00
TargetMachOWriterInfo.h
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TargetOptions.h
SjLj based exception handling unwinding support. This patch is nasty, brutish
2009-08-11 00:09:57 +00:00
TargetRegisterInfo.h
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
2009-08-11 20:47:22 +00:00
TargetRegistry.h
TargetRegistry: Change AsmPrinter constructor to be typed as returning an
2009-08-13 23:48:47 +00:00
TargetSchedule.td
Extend the instruction itinerary model to include the ability to indicate the def and use cycle for each operand. This additional information is optional, so existing itineraries do not need to be changed.
2009-08-17 16:02:57 +00:00
TargetSelect.h
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TargetSelectionDAG.td
Add a new "SDTCisVec" SDTypeConstraint. This complements the vAny type.
2009-08-12 22:30:59 +00:00
TargetSubtarget.h
Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.
2009-08-19 16:08:58 +00:00