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https://github.com/c64scene-ar/llvm-6502.git
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05d43d8b6f
vectorizer, placing it behind an off-by-default flag. It turns out that block frequency isn't what we want at all, here or elsewhere. This has been I think a nagging feeling for several of us working with it, but Arnold has given some really nice simple examples where the results are so comprehensively wrong that they aren't useful. I'm planning to email the dev list with a summary of why its not really useful and a couple of ideas about how to better structure these types of heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200294 91177308-0d34-0410-b5e6-96231b3b80d8
196 lines
7.3 KiB
LLVM
196 lines
7.3 KiB
LLVM
; RUN: opt < %s -loop-vectorize -force-vector-unroll=1 -force-vector-width=4 -loop-vectorize-with-block-frequency -dce -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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@b = common global [2048 x i32] zeroinitializer, align 16
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@c = common global [2048 x i32] zeroinitializer, align 16
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@a = common global [2048 x i32] zeroinitializer, align 16
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@G = common global [32 x [1024 x i32]] zeroinitializer, align 16
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@ub = common global [1024 x i32] zeroinitializer, align 16
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@uc = common global [1024 x i32] zeroinitializer, align 16
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@d = common global [2048 x i32] zeroinitializer, align 16
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@fa = common global [1024 x float] zeroinitializer, align 16
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@fb = common global [1024 x float] zeroinitializer, align 16
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@ic = common global [1024 x i32] zeroinitializer, align 16
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@da = common global [1024 x float] zeroinitializer, align 16
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@db = common global [1024 x float] zeroinitializer, align 16
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@dc = common global [1024 x float] zeroinitializer, align 16
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@dd = common global [1024 x float] zeroinitializer, align 16
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@dj = common global [1024 x i32] zeroinitializer, align 16
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; We can optimize this test without a tail.
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;CHECK-LABEL: @example1(
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;CHECK: load <4 x i32>
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;CHECK: add nsw <4 x i32>
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;CHECK: store <4 x i32>
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;CHECK: ret void
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define void @example1() optsize {
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br label %1
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; <label>:1 ; preds = %1, %0
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%indvars.iv = phi i64 [ 0, %0 ], [ %indvars.iv.next, %1 ]
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%2 = getelementptr inbounds [2048 x i32]* @b, i64 0, i64 %indvars.iv
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%3 = load i32* %2, align 4
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%4 = getelementptr inbounds [2048 x i32]* @c, i64 0, i64 %indvars.iv
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%5 = load i32* %4, align 4
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%6 = add nsw i32 %5, %3
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%7 = getelementptr inbounds [2048 x i32]* @a, i64 0, i64 %indvars.iv
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store i32 %6, i32* %7, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, 256
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br i1 %exitcond, label %8, label %1
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; <label>:8 ; preds = %1
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ret void
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}
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; Can't vectorize in 'optsize' mode because we need a tail.
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;CHECK-LABEL: @example2(
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;CHECK-NOT: store <4 x i32>
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;CHECK: ret void
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define void @example2(i32 %n, i32 %x) optsize {
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%1 = icmp sgt i32 %n, 0
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br i1 %1, label %.lr.ph5, label %.preheader
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..preheader_crit_edge: ; preds = %.lr.ph5
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%phitmp = sext i32 %n to i64
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br label %.preheader
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.preheader: ; preds = %..preheader_crit_edge, %0
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%i.0.lcssa = phi i64 [ %phitmp, %..preheader_crit_edge ], [ 0, %0 ]
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%2 = icmp eq i32 %n, 0
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br i1 %2, label %._crit_edge, label %.lr.ph
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.lr.ph5: ; preds = %0, %.lr.ph5
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%indvars.iv6 = phi i64 [ %indvars.iv.next7, %.lr.ph5 ], [ 0, %0 ]
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%3 = getelementptr inbounds [2048 x i32]* @b, i64 0, i64 %indvars.iv6
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store i32 %x, i32* %3, align 4
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%indvars.iv.next7 = add i64 %indvars.iv6, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next7 to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %..preheader_crit_edge, label %.lr.ph5
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.lr.ph: ; preds = %.preheader, %.lr.ph
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%indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ %i.0.lcssa, %.preheader ]
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%.02 = phi i32 [ %4, %.lr.ph ], [ %n, %.preheader ]
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%4 = add nsw i32 %.02, -1
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%5 = getelementptr inbounds [2048 x i32]* @b, i64 0, i64 %indvars.iv
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%6 = load i32* %5, align 4
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%7 = getelementptr inbounds [2048 x i32]* @c, i64 0, i64 %indvars.iv
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%8 = load i32* %7, align 4
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%9 = and i32 %8, %6
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%10 = getelementptr inbounds [2048 x i32]* @a, i64 0, i64 %indvars.iv
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store i32 %9, i32* %10, align 4
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%indvars.iv.next = add i64 %indvars.iv, 1
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%11 = icmp eq i32 %4, 0
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br i1 %11, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %.preheader
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ret void
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}
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; N is unknown, we need a tail. Can't vectorize.
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;CHECK-LABEL: @example3(
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;CHECK-NOT: <4 x i32>
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;CHECK: ret void
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define void @example3(i32 %n, i32* noalias nocapture %p, i32* noalias nocapture %q) optsize {
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%1 = icmp eq i32 %n, 0
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br i1 %1, label %._crit_edge, label %.lr.ph
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.lr.ph: ; preds = %0, %.lr.ph
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%.05 = phi i32 [ %2, %.lr.ph ], [ %n, %0 ]
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%.014 = phi i32* [ %5, %.lr.ph ], [ %p, %0 ]
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%.023 = phi i32* [ %3, %.lr.ph ], [ %q, %0 ]
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%2 = add nsw i32 %.05, -1
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%3 = getelementptr inbounds i32* %.023, i64 1
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%4 = load i32* %.023, align 16
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%5 = getelementptr inbounds i32* %.014, i64 1
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store i32 %4, i32* %.014, align 16
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%6 = icmp eq i32 %2, 0
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br i1 %6, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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ret void
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}
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; N is unknown, we need a tail. Can't vectorize because the loop is cold.
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;CHECK-LABEL: @example4(
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;CHECK-NOT: <4 x i32>
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;CHECK: ret void
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define void @example4(i32 %n, i32* noalias nocapture %p, i32* noalias nocapture %q) {
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%1 = icmp eq i32 %n, 0
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br i1 %1, label %._crit_edge, label %.lr.ph, !prof !0
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.lr.ph: ; preds = %0, %.lr.ph
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%.05 = phi i32 [ %2, %.lr.ph ], [ %n, %0 ]
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%.014 = phi i32* [ %5, %.lr.ph ], [ %p, %0 ]
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%.023 = phi i32* [ %3, %.lr.ph ], [ %q, %0 ]
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%2 = add nsw i32 %.05, -1
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%3 = getelementptr inbounds i32* %.023, i64 1
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%4 = load i32* %.023, align 16
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%5 = getelementptr inbounds i32* %.014, i64 1
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store i32 %4, i32* %.014, align 16
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%6 = icmp eq i32 %2, 0
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br i1 %6, label %._crit_edge, label %.lr.ph
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._crit_edge: ; preds = %.lr.ph, %0
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ret void
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}
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!0 = metadata !{metadata !"branch_weights", i32 64, i32 4}
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; We can't vectorize this one because we need a runtime ptr check.
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;CHECK-LABEL: @example23(
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;CHECK-NOT: <4 x i32>
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;CHECK: ret void
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define void @example23(i16* nocapture %src, i32* nocapture %dst) optsize {
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br label %1
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; <label>:1 ; preds = %1, %0
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%.04 = phi i16* [ %src, %0 ], [ %2, %1 ]
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%.013 = phi i32* [ %dst, %0 ], [ %6, %1 ]
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%i.02 = phi i32 [ 0, %0 ], [ %7, %1 ]
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%2 = getelementptr inbounds i16* %.04, i64 1
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%3 = load i16* %.04, align 2
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%4 = zext i16 %3 to i32
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%5 = shl nuw nsw i32 %4, 7
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%6 = getelementptr inbounds i32* %.013, i64 1
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store i32 %5, i32* %.013, align 4
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%7 = add nsw i32 %i.02, 1
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%exitcond = icmp eq i32 %7, 256
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br i1 %exitcond, label %8, label %1
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; <label>:8 ; preds = %1
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ret void
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}
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; We CAN vectorize this example because the pointers are marked as noalias.
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;CHECK-LABEL: @example23b(
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;CHECK: <4 x i32>
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;CHECK: ret void
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define void @example23b(i16* noalias nocapture %src, i32* noalias nocapture %dst) optsize {
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br label %1
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; <label>:1 ; preds = %1, %0
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%.04 = phi i16* [ %src, %0 ], [ %2, %1 ]
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%.013 = phi i32* [ %dst, %0 ], [ %6, %1 ]
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%i.02 = phi i32 [ 0, %0 ], [ %7, %1 ]
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%2 = getelementptr inbounds i16* %.04, i64 1
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%3 = load i16* %.04, align 2
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%4 = zext i16 %3 to i32
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%5 = shl nuw nsw i32 %4, 7
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%6 = getelementptr inbounds i32* %.013, i64 1
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store i32 %5, i32* %.013, align 4
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%7 = add nsw i32 %i.02, 1
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%exitcond = icmp eq i32 %7, 256
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br i1 %exitcond, label %8, label %1
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; <label>:8 ; preds = %1
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ret void
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}
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