llvm-6502/test/CodeGen
Matt Arsenault 26bc2c8eed R600/SI: Add failing test for 3 x i64 vectors.
Stores of <4 x i64> do work (although they do expand to 4 stores
instead of 2), but 3 x i64 vectors fail to select.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 20:29:40 +00:00
..
AArch64 ARM & AArch64: merge NEON absolute compare intrinsics 2014-02-04 14:55:42 +00:00
ARM Remove -arm-disable-ehabi option 2014-02-07 20:12:49 +00:00
CPP
Generic [DAG] Don't pull the binary operation though the shift if the operands have opaque constants. 2014-02-06 04:09:06 +00:00
Hexagon DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0} 2014-02-04 01:23:52 +00:00
Inputs
Mips [mips] Forbid the use of registers t6, t7 and t8 if the target is NaCl. 2014-02-07 17:16:40 +00:00
MSP430
NVPTX
PowerPC Fix a bug with .weak_def_can_be_hidden: Mutable variables cannot use it. 2014-02-07 16:21:30 +00:00
R600 R600/SI: Add failing test for 3 x i64 vectors. 2014-02-07 20:29:40 +00:00
SPARC [Sparc] Emit relocations for Thread Local Storage (TLS) when integrated assembler is used. 2014-02-07 05:54:20 +00:00
SystemZ
Thumb
Thumb2 Remove -arm-disable-ehabi option 2014-02-07 20:12:49 +00:00
X86 Fix a bug with .weak_def_can_be_hidden: Mutable variables cannot use it. 2014-02-07 16:21:30 +00:00
XCore