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https://github.com/c64scene-ar/llvm-6502.git
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26d628d6ce
Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
71 lines
1.5 KiB
LLVM
71 lines
1.5 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ALL
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; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=ALL
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; FIXME Add tests for thumbv7, they currently fail MI verification because
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; of a mismatch in register classes in uses.
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; This test verifies that load/store instructions are properly generated,
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; and that they pass MI verification (wasn't the case until 2013-06-08).
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@a = global i8 1, align 1
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@b = global i16 2, align 2
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@c = global i32 4, align 4
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; ldr
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define i8 @t1() nounwind uwtable ssp {
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; ALL: @t1
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; ALL: ldrb
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; ALL: add
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%1 = load i8* @a, align 1
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%2 = add nsw i8 %1, 1
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ret i8 %2
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}
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define i16 @t2() nounwind uwtable ssp {
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; ALL: @t2
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; ALL: ldrh
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; ALL: add
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%1 = load i16* @b, align 2
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%2 = add nsw i16 %1, 1
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ret i16 %2
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}
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define i32 @t3() nounwind uwtable ssp {
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; ALL: @t3
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; ALL: ldr
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; ALL: add
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%1 = load i32* @c, align 4
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%2 = add nsw i32 %1, 1
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ret i32 %2
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}
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; str
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define void @t4(i8 %v) nounwind uwtable ssp {
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; ALL: @t4
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; ALL: add
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; ALL: strb
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%1 = add nsw i8 %v, 1
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store i8 %1, i8* @a, align 1
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ret void
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}
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define void @t5(i16 %v) nounwind uwtable ssp {
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; ALL: @t5
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; ALL: add
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; ALL: strh
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%1 = add nsw i16 %v, 1
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store i16 %1, i16* @b, align 2
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ret void
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}
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define void @t6(i32 %v) nounwind uwtable ssp {
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; ALL: @t6
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; ALL: add
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; ALL: str
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%1 = add nsw i32 %v, 1
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store i32 %1, i32* @c, align 4
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ret void
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}
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