Akira Hatanaka 27ba61df9f Insert instructions to the entry basic block which initializes the global ... pointer register. This is the first of the series of patches which clean up the way global pointer register is used. The patches will make the following improvements: - Make $gp an allocatable temporary register rather than reserving it. - Use a virtual register as the global pointer register and let the register allocator decide which register to assign to it or whether spill/reloads are needed. - Make sure $gp is valid at the entry of a called function, which is necessary for functions using lazy binding. - Remove the need for emitting .cprestore and .cpload directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156671 91177308-0d34-0410-b5e6-96231b3b80d8		2012-05-12 00:17:17 +00:00
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ARM	Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate offset addressing. The assembler and instruction printer were not properly handeling the #-0 immediate.	2012-05-11 09:10:54 +00:00
AsmParser	MC: Unknown assembler directives are now hard errors.	2012-05-01 18:38:27 +00:00
COFF	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Disassembler	Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.	2012-05-11 09:28:27 +00:00
ELF	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
MachO	Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits	2012-05-03 22:41:56 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	Insert instructions to the entry basic block which initializes the global	2012-05-12 00:17:17 +00:00
X86	Add retw and lretw instructions. Also, fix Intel syntax parsing for all	2012-04-11 01:10:53 +00:00